MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 1399

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

RTC (real-time clock register)
RTCAL (real-time clock alarm register)
RTCSC (real-time clock status and control register)
Rx data register
Rx shifter register
Rx_config_1 (Rx configuration register 1)
Rx_Config_2 (Rx configuration register 2)
RXECTR (receive error counter)
S
SCALE_TCLK_REG (scale tclk register)
SCCR (system clock control register)
SCCxR0 (QSMCM SCI control register 0)
SCCxR1 (QSMCM SCI control register 1)
SCDR (QSMCM SCI data register)
SCxSR (QSMCM SCIx status register)
SGPIO
SHORT_CH_REG (short channels register)
SHORT_REG (short register)
SIMASK (SIU interrupt mask register)
SIMASK2 (SIU interrupt mask register 2)
SIMASK3 (SIU interrupt mask register 3)
SIPEND (SIU interrupt pending register)
SIPEND2 (SIU interrupt pending register 2)
SIPEND3 (SIU interrupt pending register 3)
SIU
SIU interrupt in-service register
SIUMCR (SIU module configuration register)
SPCR0 (QSPI control register 0)
SPCR1 (QSPI control register 1)
SPCR2 (QSPI control register 2)
SPCR3 (QSPI control register)
SPRG0-SPRG3 (general special-purpose registers 0-3)
3-24
SPSR (QSPI status register)
SRR0 (machine status save/restore register 0)
SWSR (software service register)
SYPCR (system protection control register)
System configuration and protection registers
System configuration registers
System protection registers
System timer registers
T
TBREF0 (ime base reference registers)
TBREF1 (time base reference register 1)
TBSCR (time base control and status register)
Freescale Semiconductor
control register (SGPIOCR)
data register 1 (SGPIODT1)
data register 2 (SGPIODT2)
interrupt edge level register (SIEL)
interrupt mask register (SIMASK)
interrupt registers
interrupt vector register (SIVEC)
18-17
18-18
6-31
6-40
6-37
15-21
18-19
6-43
6-24
15-21
6-37
6-48
6-46
6-47
15-17
15-19
15-20
16-36
6-38
15-51
8-29
6-35
MPC561/MPC563 Reference Manual, Rev. 1.2
6-33
6-33
15-49
6-41
6-35
6-44
6-41
6-32
18-24
6-34
6-35
18-16
15-46
15-47
18-16
6-37
18-22
6-32
6-33
6-24
3-23
6-42
6-25
6-42
TESR (transfer error status register)
TICR (TPU3 interrupt configuration register)
TIMER (free running timer register)
TouCAN
TPU3
TPUMCR (TPU3 module configuration register)
TPUMCR2 (TPU3 module configuration register 2)
19-19
TPUMCR3 (TPU3 module configuration register 3)
19-21
Tx data register
Tx_Config_1 (Tx configuration register 1)
Tx_Config_2 (Tx configuration register 2)
U
UC3FCFIG (hard reset configuration word)
UC3FCTL (UC3F EEPROM high voltage control register
21-11
UIMB
UIPEND (UIMB pending interrupt reqiuest register)
UMCR (UIMB module configuration register)
V
VSRMSR (VDDSRM
CANCTRL0 (control register 0)
CANCTRL1 (control register 1)
CANCTRL2 (control register 2)
CANICR (interrupt configuration register)
CANMCR (module configuration register)
ESTAT (error and status register)
IFLAG (interrupt flag register)
IMASK (interrupt mask register)
PRESDIV (prescaler divide register)
receive buffer 14 mask registers
receive buffer 15 mask registers
receive mask registers
RXGMSKHI (receive global mask registers)
Test configuration register
channel function select registers (CFSRx)
channel interrupt enable register (CIER)
channel interrupt status register (CISR)
channel priority registers (CPRx)
development support control register (DSCR)
development support status register (DSSR)
host sequence registers (HSQRx)
host service request registers (HSSRx)
interrupt configuration register (TICR)
module configuration register (TPUMCR)
module configuration register 2 (TPUMCR2)
module configuration register 3 (TPUMCR3)
service grant latch register (SGLR)
module configuration register (UMCR)
pending interrupt request register (UIPEND)
test control register (UTSTCREG)
,
19-22
18-18
16-7
16-27
16-36
6-39
16-31
16-32
16-33
16-27
16-28
16-30
16-35
19-18
19-16
16-33
12-8
19-22
16-29
18-15
18-15
19-17
19-14
21-16
19-19
12-7
19-15
19-14
19-15
RegIndex-7
12-7
19-11
16-27
16-25
19-13
19-11
16-31
12-8
19-19
19-21
19-12
12-9