MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 1396

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

Registers
RegIndex-4
SCCxR1 (QSMCM SCI control register 1)
SCDR (QSMCM SCI data register)
SCxSR (QSMCM SCIx status register)
SPCR0 (QSPI control register 0)
SPCR1 (QSPI control register 1)
SPCR2 (QSPI control register 2)
SPCR3 (QSPI control register)
SPRG0-SPRG3 (general special-purpose registers
SPSR (QSPI status register)
SRR0 (machine status save/restore register 0)
TBREF1 (time base reference register 1)
TICR (TPU3 interrupt configuration register)
TPUMCR (TPU3 module configuration register)
TPUMCR2 (TPU3 module configuration register 2)
TPUMCR3 (TPU3 module configuration register 3)
UC3FCFIG (hard reset configuration word)
UC3FCTL (UC3F EEPROM high voltage control reg-
UIPEND (UIMB pending interrupt reqiuest register)
UMCR (UIMB module configuration register)
XER (integer exception register)
Associated registers
BAR (breakpoint address register)
BBCMCR (BBC module configuration register)
BR0 - BR3 (memory controller base registers 0-3)
Breakpoint counter B value and control register
CALRLAM_OTR (CALRAM ownership trace regis-
CMPA-CMPD (comparator A-D value registers )
CMPE-CMPF (comparator E-F value registers)
CMPG-CMPH (comparator G-H value registers)
COLIR (change of lock register)
COUNTA (breakpoint counter A value and control
COUNTB (breakpoint counter B value and control
CRAM_RBAx (CALRAM region base address regis-
CRAMMCR (CALRAM module configuration regis-
CRAMOVL (CALRAM overlay configuration regis-
0-3)
19-11
19-19
19-21
ister
12-9
10-32
(COUNTB)
ter)
23-41
23-46
23-47
register)
register)
ter)
ter)
22-17
22-15
22-13
3-24
21-11
,
19-22
23-45
23-46
10-4
23-46
15-21
15-21
8-36
15-17
15-19
15-20
3-18
MPC561/MPC563 Reference Manual, Rev. 1.2
23-53
15-51
15-49
6-41
15-47
21-16
19-14
3-23
12-7
4-19
DEC (decrementer register)
DER (debug enable register)
DMBR (dual mapping base register)
DPDR (development port data register)
DPTRAM
Dual mapping option register
ECR (exception cause register)
EIBADR (external interrupt relocation table base ad-
EMCR (external master control register)
General-Purpose I/O registers
GPDI (general-purpose data in register)
GPDO (general-purpose data out register)
ICTRL (I-bus support control register)
Internal memory map register
Keep alive power registers lock mechanism
L2U
LCTRL1 (L-bus support control register 1)
LCTRL1 (L-bus support control register 2)
MBISM
MCPSMSCR (MCPSM status/control register)
MDASMSCR (MDASM status/control register)
MI_GRA (global region attribute register)
MI_RA 1 - 3 (region base address registers (1 - 3))
MI_RBA 0 - 3 (region base address registers (0 - 3))
MIOS
MIOS1
MIOS14ER0 interrupt enable register
MIOS14ER1interrupt enable register
MIOS14MCR (MIOS14 module configuration regis-
module configuration register (DPTMCR)
ram base address register (RAMBAR)
global region attribute register (L2U_GRA)
module
region attribute registers (L2U_RAx)
region base address registers (L2U_RBAx)
interrupt registers
bus interface (MBISM) Registers
interrupt
interrupt
module
ter)
dress register)
17-43
4-22
4-21
ter)
22-17
17-15
11-16
11-13
11-14
(MIOS1LVL1)
(MIOS1LVL0)
(MIOS1VNR)
configuration
and
level
level
17-69
version
4-25
register
register
6-40
17-14
Freescale Semiconductor
23-43
17-69
17-70
10-37
6-46
6-28
register
23-41
number
0
1
10-36
17-68
17-66
17-13
23-51
(MIOSLVL0)
(MIOSLVL1)
23-53
18-19
(L2U_MCR)
6-29
11-15
18-18
4-23
20-4
23-47
23-48
8-25
,
register
17-18
20-3
A-16