MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 278

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

System Configuration and Protection
6.2.2.3.2
The SWSR is the location to which the SWT servicing sequence is written. To prevent SWT time-out, a
0x556C followed by 0xAA39 should be written to this register. The SWSR can be written at any time but
returns all zeros when read.
6-38
HRESET
HRESET
16:23
25:27
Bits
0:15
24
28
29
30
31
Field
Addr
Field
MSB
SWTC
Name
SWRI
SWE
SWP
16
BME
SWF
BMT
Software Service Register (SWSR)
0
—
17
1
Software watchdog timer count. This field contains the count value of the software watchdog
timer.
Bus monitor timing. This field specifies the time-out period, in eight-system-clock resolution, of
the bus monitor. BMT must be set to non zero even if the bus monitor is not enabled.
Bus monitor enable
0 Disable bus monitor
1 Enable bus monitor
Reserved
Software watchdog freeze
0 Software watchdog continues to run while FREEZE is asserted
1 Software watchdog stops while FREEZE is asserted
Software watchdog enable. Software should clear this bit after a system reset to disable the
software watchdog timer.
0 Watchdog is disabled
1 Watchdog is enabled
Software watchdog reset/interrupt select
0 Software watchdog time-out causes a non-maskable interrupt to the RCPU
1 Software watchdog time-out causes a system reset
Software watchdog prescale
0 Software watchdog timer is not prescaled
1 Software watchdog timer is prescaled by 2048
Figure 6-26. System Protection Control Register (SYPCR)
18
2
1111_1111
19
3
BMT
MPC561/MPC563 Reference Manual, Rev. 1.2
Table 6-15. SYPCR Bit Descriptions
20
4
21
5
22
6
1111_1111_1111_1111
23
7
0x2F C004
SWTC
BME
24
Description
0
8
25
9
000
—
10
26
11
27
SWF SWE SWRI SWP
12
28
0
Freescale Semiconductor
13
29
1
14
30
1
LSB
15
31
1