MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 716

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

CAN 2.0B Controller Module
16-22
Access
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
—
—
S
0x30 788C – 0x30 788E(C)
0x30 789C – 0x30 789E(C)
0x30 708C – 0x30 708E(A)
0x30 748C – 0x30 748E(B)
0x30 709C – 0x30 709E(A)
0x30 749C– 0x30 749E(B)
0x30 788A(C)
0x30 789A(C)
0x30 78A0(C)
0x30 78A2(C)
0x30 78A4(C)
0x30 7084(A)
0x30 7484(B)
0x30 7884(C)
0x30 7086(A)
0x30 7486(B)
0x30 7886(C)
0x30 7088(A)
0x30 7488(B)
0x30 7888(C)
0x30 708A(A)
0x30 748A(B)
0x30 7090(A)
0x30 7490(B)
0x30 7890(C)
0x30 7092(A)
0x30 7492(B)
0x30 7892(C)
0x30 7094(A)
0x30 7494(B)
0x30 7894(C)
0x30 7096(A)
0x30 7496(B)
0x30 7896(C)
0x30 7098(A)
0x30 7498(B)
0x30 7898(C)
0x30 709A(A)
0x30 749A(B)
0x30 70A0(A)
0x30 74A0(B)
0x30 70A2(A)
0x30 74A2(B)
0x30 70A4(A)
0x30 74A4(B)
Address
Table 16-10. TouCAN Register Map (continued)
MPC561/MPC563 Reference Manual, Rev. 1.2
MSB
0
See
See
Control Register 0 (CANCTRL0_x)
See
See
See
See
Divider Register (PRESDIV_x)
Table 16-13
Table 16-17
Section 16.7.10, “Receive Buffer 14 Mask Registers (RX14MSKHI,
Section 16.7.10, “Receive Buffer 14 Mask Registers (RX14MSKHI,
Section 16.7.11, “Receive Buffer 15 Mask Registers (RX15MSKHI,
Section 16.7.11, “Receive Buffer 15 Mask Registers (RX15MSKHI,
Control and Prescaler
Receive Buffer 14 Mask – Low (RX14MSKLO_x)
Receive Buffer 15 Mask – Low (RX15MSKLO_x)
Receive Buffer 14 Mask – High (RX14MSKHI_x)
Receive Buffer 15 Mask – High (RX15MSKHI_x)
Receive Global Mask – Low (RXGMSKLO_x)
Receive Global Mask – High (RXGMSKHI_x)
Free-Running Timer Register (TIMER_x)
TouCAN Interrupt Register (CANICR_x)
for bit descriptions.
for bit descriptions.
Error and Status Register (ESTAT_x)
See
See
See
See
See
See
See
RX14MSKLO),” for bit descriptions.
RX14MSKLO),” for bit descriptions.
RX15MSKLO),” for bit descriptions.
RX15MSKLO),” for bit descriptions.
Interrupt Masks (IMASK_x)
Table 16-12
Table 16-19
Table 16-20
Table 16-20
Table 16-23
Table 16-26
Table 16-27
Interrupt Flags (IFLAG_x)
Reserved
Reserved
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
See
See
Control Register 1 (CANCTRL1_x)
Control Register 2 (CANCTRL2_x)
Table 16-16
Table 16-18
Freescale Semiconductor
for bit descriptions.
for bit descriptions.
LSB
15