MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 128

MPC561MZP56

Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet

Specifications of MPC561MZP56

Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant

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Signal Descriptions
2.5.2
The MPC561/MPC563 has a 10 pin BDM port. See
The BDM mode is entered by the following sequence of events:
BDM mode is exited by:
2.5.3
The READI module signals support the Nexus (IEEE-ISTO 5001-1999) auxiliary port interface for debug.
There are two modes available: full port mode and reduced port mode. Reduced port mode allows for a 1
bit input stream and a 2 bit output stream. Full port mode allows for a 2-bit input stream and an 8-bit output
stream. If MDI0 is held high when Nexus mode is enabled, full port mode will be used during Nexus
debug. If MDI0 is held low when Nexus mode is enabled, reduced port mode will be used. See
for Nexus mode selection.
The Nexus interface is entered by the following sequence of events:
2-30
PORESET/TRST
JCOMP/RSTI
JCOMP/RSTI
Hold DSCK high at reset negation (SRESET)
Configure DSDI to select BDM clock mode, within 8 clocks of reset negation
Reset the device by asserting PORESET/TRST or HRESET
Hold JCOMP/RSTI low while negating PORESET/TRST
Hold TMS/EVTI low to enable Nexus mode and configure TDI/DSDI/MDI0 for full or reduced
port mode. Both of these should be done at least 4 clocks before driving JCOMP/RSTI high
TMS/EVTI
SRESET
BDM Mode Selection
Nexus Mode Selection
DSCK
DSDI
(low)
(low)
BDM Enable
JTAG Config
Figure 2-4. Debug Mode Selection (JTAG)
Figure 2-5. Debug Mode Selection (BDM)
MPC561/MPC563 Reference Manual, Rev. 1.2
JTAG On
Configure BDM
Enable Nexus
Figure 2-5
for BDM mode selection.
JTAG Disabled
BDM On
Nexus Off
T
Freescale Semiconductor
T
Figure 2-6

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