MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 1165

MPC561MZP56

Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet

Specifications of MPC561MZP56

Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant

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Freescale Semiconductor
0
ADDRESS OFFSETS
1
0x30XXWC
0x30XXWE
0x30XXW0
0x30XXW2
0x30XXW4
0x30XXW6
0x30XXW8
0x30XXWA
2
0
0
0
3
1
1
1
0
0
Channel Interrupt Status
= Written By RCPU
= Written By TPU
Channel Function Select
Host Sequence
Host Service Request
Channel Priority
Channel Interrupt Enable
NAME
0
TDRE
1
Figure D-7. UART Transmitter Parameters
MPC561/MPC563 Reference Manual, Rev. 1.2
2
3
xxxx – UART Function Number. Assigned
during microcode assembly. See
Table D-1
00 – No Parity
01 – No Parity
10 – Even Parity
11 – Odd Parity
00 – Not Used
01 – Not Used
10 – Transmit
11 – Receive
00 – Disabled
01 – Low Priority
10 – Medium Priority
11 – High Priority
0 – Channel Interrupt Disabled
1 – Channel Interrupt Enabled
0 – Channel Interrupt Not Asserted
1 – Channel Interrupt Asserted
4
PARAMETER RAM
CONTROL BITS
= Written by RCPU and TPU
= Unused Parameters
5
ACTUAL_BIT_COUNT
SHIFT_REGISTER
6
PARITY_TEMP
MATCH_RATE
TRANSMIT_DATA_REG
DATA_SIZE
7
OPTIONS
BITS
8
9
10 11 12 13
W = Channel Number
For address offsets: XX=41 for
TPU_A, 45 for TPU_B
YY=40 for TPU_A,
See
PRAM Address Offset Map.
44 for TPU_B
Table 19-24
0x30YY1C – 0x30YY1E
0x30YY0C – 0x30YY12
0x30YY18 – 0x30YY1A
0x30YY14 – 0x30YY16
14
ADDRESSES
0x30YY0A
0x30YY20
15
for the
TPU3 ROM Functions
Param 0
Param 1
Param 2
Param 3
Param 4
Param 5
Param 6
Param 7
D-13

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