MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 1107

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

The DCCR registers should be programmed with data supplied by the code compression tool, in order to
be correlated with the compressed code.
1. The DCCR0 register is hard coded for the “bypass decompressor class.” Write accesses do not affect the DCCR0 register. The
Freescale Semiconductor
,
DCCR0 register will always return 0x0000 0000 when read.
•
Reset
Reset
When fetching 32 bits of decompressed instruction from the DECRAM, each 16 bits will be read
from different RAM banks.
Field
Field
Addr DCCR0
DCCR1 0x2F + A004
DCCR2 0x2F + A008
DCCR3 0x2F + A00C
MSB
16
0
Unaffected
Figure A-14. Decompressor Class Configuration Registers
1
17
TP1LEN
1
0x2F + A000
18
2
TP2BA
19
3
MPC561/MPC563 Reference Manual, Rev. 1.2
DCCR4 0x2F + A010
DCCR5 0x2F + A014
DCCR6 0x2F + A018
DCCR7 0x2F + A01C
20
0
4
TP2LEN
21
5
Unaffected
AS
22
6
DS
Unaffected
23
7
DCCR8 0x2F + A020
DCCR9 0x2F + A024
DCCR10 0x2F + A028
DCCR11 0x2F + A02C
24
8
25
9
10
26
MPC562/MPC564 Compression Features
TP1BA
0000_0000
11
27
1
(DCCRx)
—
DCCR12 0x2F + A030
DCCR13 0x2F + A034
DCCR14 0x2F + A038
DCCR15 0x2F + A03C
12
28
13
29
14
30
TP2BA
LSB
15
31
A-19