MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 420

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

Memory Controller
10.3.5
Table 10-3
10-22
Address
RD/WR
Clock
TRLX
CSx
CSy
Data
OE
TS
TA
0
0
0
0
0
0
0
0
summarizes the different combinations of timing options.
Figure 10-18. Consecutive Accesses (Read After Read from Same Bank, EHTR = 1)
Access
Summary of GPCM Timing Options
Type
write
write
write
write
write
read
read
read
ACS
00
10
11
00
10
11
00
10
CSNT
Table 10-3. Programming Rules for Timing Strobes
X
X
X
0
0
0
1
1
MPC561/MPC563 Reference Manual, Rev. 1.2
1/4 * clock
1/2 * clock
1/4 * clock
1/2 * clock
1/4 * clock
Asserted
Address
to CS
0
0
0
Negated to
1/4 * clock
1/4 * clock
1/4 * clock
1/4 * clock
1/4 * clock
1/4 * clock
1/4 * clock
1/2 * clock
Add/Data
Tdt
Invalid
CS
Address to
WE/BE or
3/4 * clock
3/4 * clock
3/4 * clock
3/4 * clock
3/4 * clock
3/4 * clock
3/4 * clock
3/4 * clock
Asserted
OE
Negated to
1/4 * clock
1/4 * clock
1/4 * clock
1/2 * clock
1/2 * clock
Add/Data
WE/BE
Invalid
X
X
X
Negated to
1/4 * clock
1/4 * clock
1/4 * clock
Add/Data
Invalid
OE
X
X
X
X
X
Freescale Semiconductor
Number of
2 + SCY
2 + SCY
2 + SCY
2 + SCY
2 + SCY
2 + SCY
2 + SCY
2 + SCY
Cycles
Total