MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 139

MPC561MZP56

Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet

Specifications of MPC561MZP56

Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant

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Freescale Semiconductor
A_TPUCH[0:15
B_TPUCH[0:15
MPIO32B13
MPIO32B15
MPIO32B12 /
MPIO32B14 /
Signal List
ETRIG[1:2] /
PPM_TCLK
A_T2CLK /
B_T2CLK /
C_CNTX0
PPM_RX0
PPM_TX0
PCS[6:7]
A_ANw /
A_PQB0
A_AN0 /
PCS5
PCS4
]
]
3
3
1
/
/
Voltage
2.6 V
2.6 V
2.6 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
Table 2-14. MPC561/MPC563 Signal Reset State (continued)
Controlled
Slew Rate
Option?
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
MPC561/MPC563 Reference Manual, Rev. 1.2
No
No
No
No
QADC64E_A / QADC64E_B
50 ; 50
50 ; 50
50 ; 50
50 ; 50
50 ; 50
50 ; 50
50 ; 50
50 ; 50
50 ; 25
50 ; 50
50 ; 25
50 ; 50
50 ; 50
50 ; 50
50 ; 50
50 ; 50
50 ; 50
Drive
Load
(pF)
N/A
NA
NA
NA
NA
2
TPU_A / TPU_B
5
5
5
5
5
5
5
PU5 until
PULL_DIS0 is
set
Pull device
enabled until
PULL_DIS0 is
set
Pull device
enabled until
PULL_DIS0 is
set
Pull device
enabled until
PULL_DIS0 is
set
Pull device
enabled until
PRDS is set
PU5 when driver
not enabled or
until T2CLK_PU
is set
Pull device
enabled until
PRDS is set
PU5 when driver
not enabled or
until T2CLK_PU
is set
PD until
PULL_DIS5 is
set
PU5 until
PULL_DIS1 is
set
PU5 when driver
not enabled or
until
PULL_DIS2 is
set
Reset State
16
16
16
16
16
Hysteresi
Enabled?
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
No
No
No
No
s
MPIO32B12
MPIO32B13
MPIO32B14
MPIO32B15
A_TPUCH[0:15]
A_T2CLK
B_TPUCH[0:15]
B_T2CLK
ETRIG[1:2]
A_AN0
Function After HRESET,
PORESET/TRST
Signal Descriptions
2-41

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