MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 18

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

14.4.4.2
14.4.4.3
14.4.4.3.1
14.4.4.3.2
14.4.4.3.3
14.4.4.3.4
14.4.4.4
14.4.4.4.1
14.4.4.4.2
14.4.4.4.3
14.4.4.4.4
14.4.5
14.4.6
14.4.7
14.4.7.1
14.4.7.2
14.5
14.5.1
14.5.2
14.6
14.6.1
14.6.2
14.6.3
14.6.3.1
14.6.4
14.6.5
14.6.5.1
14.6.5.2
14.6.5.3
14.6.5.4
15.1
15.2
15.2.1
15.3
15.4
15.4.1
15.4.2
Freescale Semiconductor
Paragraph
Number
Trigger and Queue Interaction Examples ................................................................... 14-53
QADC64E Integration Requirements ......................................................................... 14-65
Block Diagram .............................................................................................................. 15-1
Key Features ................................................................................................................. 15-2
Memory Maps ............................................................................................................... 15-4
QSMCM Global Registers ............................................................................................ 15-6
QADC64E Clock (QCLK) Generation ................................................................... 14-48
Periodic/Interval Timer ........................................................................................... 14-50
Configuration and Control Using the IMB3 Interface ............................................ 14-51
Queue Priority Schemes .......................................................................................... 14-53
Conversion Timing Schemes .................................................................................. 14-62
Port Digital Input/Output Signals ........................................................................... 14-65
External Trigger Input Signals ................................................................................ 14-66
Analog Power Signals ............................................................................................. 14-66
Analog Reference Signals ....................................................................................... 14-69
Analog Input Signals .............................................................................................. 14-70
MPC561/MPC563 QSMCM Details ........................................................................ 15-3
Low-Power Stop Operation ...................................................................................... 15-6
Freeze Operation ....................................................................................................... 15-6
Reserved Mode ................................................................................................... 14-42
Single-Scan Modes ............................................................................................. 14-43
Continuous-Scan Modes ..................................................................................... 14-45
QADC64E Bus Interface Unit ............................................................................ 14-51
QADC64E Bus Accessing .................................................................................. 14-51
Analog Supply Filtering and Grounding ............................................................ 14-67
Analog Input Considerations .............................................................................. 14-71
Settling Time for the External Circuit ................................................................ 14-73
Error Resulting from Leakage ............................................................................ 14-73
Accommodating Positive/Negative Stress Conditions ....................................... 14-74
Software Initiated Single-Scan Mode ............................................................. 14-43
External Trigger Single-Scan Mode ............................................................... 14-44
External Gated Single-Scan Mode ................................................................. 14-44
Periodic/Interval Timer Single-Scan Mode .................................................... 14-45
Software Initiated Continuous-Scan Mode ..................................................... 14-46
External Trigger Continuous-Scan Mode ....................................................... 14-47
External Gated Continuous-Scan Mode ......................................................... 14-47
Periodic/Interval Timer Continuous-Scan Mode ............................................ 14-48
Queued Serial Multi-Channel Module
MPC561/MPC563 Reference Manual, Rev. 1.2
Contents
Chapter 15
Title
Number
Page
xviii