MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 262

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

System Configuration and Protection
Although the writes must occur in the correct order prior to time-out, any number of instructions may be
executed between the writes. This allows interrupts and exceptions to occur, if necessary, between the two
writes.
Not 0x556C/Don’t Reload
Reset
0x556C/Don’t Reload
State 0
State 1
Waiting for 0x556C
Waiting for 0xAA39
0xAA39/Reload
Not 0x556C/Don’t Reload
Not 0xAA39/Don’t Reload
Figure 6-9. SWT State Diagram
Although most software disciplines support the watchdog concept, different systems require different
time-out periods. For this reason, the software watchdog provides a selectable range for the time-out
period.
In
Figure
6-10, the range is determined by the value in the SWTC field. The value held in the SWTC field
is then loaded into a 16-bit decrementer clocked by the system clock. An additional divide by 2048
prescaler is used if necessary. The decrementer begins counting when loaded with a value from the
software watchdog timing count field (SWTC). After the timer reaches 0x0, a software watchdog
expiration request is issued to the reset or NMI control logic.
Upon reset, the value in the SWTC is set to the maximum value and is again loaded into the software
watchdog register (SWR), starting the process over. When a new value is loaded into the SWTC, the
software watchdog timer is not updated until the servicing sequence is written to the SWSR. If the SWE
is loaded with the value zero, the modulus counter does not count (i.e. SWTC is disabled).
MPC561/MPC563 Reference Manual, Rev. 1.2
6-22
Freescale Semiconductor