MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 1230

MPC561MZP56

Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet

Specifications of MPC561MZP56

Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant

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Electrical Characteristics
is required is due to ESD diodes in the pad logic for dual 2.6-V/5-V compliant pins and 2.6-V pins. The
diodes are forward biased when V
Figure F-1
power-up sequence if a keep-alive supply is required. The keep-alive supply should be powered-up at the
same instant or before both the high voltage and low voltage supplies are powered-up.
The option A power-down sequence (excluding V
Figure F-3
F-14
1. V
2. V
DDH
DDH
illustrates the power-up sequence if no keep-alive supply is required.
illustrates the power-down sequence if no keep-alive supply is required.
V
DDKA
V
V
DDL
DDL
Figure F-1. Option A Power-Up Sequence Without Keep-Alive Supply
Figure F-2. Option A Power-Up Sequence With Keep-Alive Supply
+ 3.1 V (V
- 0.5 V (V
V
V
DDH
DDH
V
V
cannot lead V
cannot lag V
DDH
DDH
cannot lead V
cannot lag V
DDH
MPC561/MPC563 Reference Manual, Rev. 1.2
DDH
DDL
cannot lead V
DDL
cannot lag V
is greater than V
DDL
by more than 0.5 V
by more than 3.1 V
DDL
DDL
by more than 0.5 V
3.1-V lead
3.1-V lead
by more than 3.1 V
DDKA
DDL
DDL
0.5-V lag
0.5-V lag
DDH
by more than 3.1 V)
) is
by more than 0.5 V)
and will start to conduct current.
Figure F-2
V
V
V
V
DDH
DDL
DDH
DDL
Freescale Semiconductor
illustrates the

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