MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 983

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

24.6.1.8
The UDI register, a 34-bit register, is used to store the data to be written for block write access, and the
data read for read (single and block) accesses.
Freescale Semiconductor
RCPU
27:28
29:60
61:62
64:79
Bits
63
Nexus
52:51
50:19
18:17
Upload/Download Information Register (UDI)
Bits
15:0
16
Table 24-11. RWA Read/Write Access Bit Descriptions (continued)
Name
MAP
CNT
PRV
WD
SZ
The word size (SZ) field can be configured to allow 32-bit, 16-bit, or 8-bit read/write
accesses. If the field is configured to one of the reserved states, its action reverts to
that of the default state.
00 32-bit
01 16-bit
10 8-bit
11 Reserved
Write data (WD) bits contain the data to be written. For a read access, the data stored
is a don’t care.
The Privilege Attribute Field can be configured to select different read/write access
attributes.
00 User Data
01 User Instruction
10 Supervisor Data
11 Supervisor Instruction
The Map Select Field can be configured to allow access to multiple memory maps.
The primary processor memory map (MAP equal to 0b0) is designated as the default.
The secondary memory map (MAP equal to 0b1) can be set to select the MPC500
special purpose registers.
0 Primary memory map
1 Secondary memory map (PPC Special Purpose Registers)
The Access Count Field can be configured to indicate the number of accesses of word
size (defined in SZ field). The CNT value is used to increment the specified address
in the RWAD field for block read/write accesses.
For a single read/write access, the CNT value should equal to 0x0000. A 64-Kbyte
block read/write access can be performed by configuring the CNT bits as 0xFFFF. If
a user wants to terminate a block read or write access which has not completed, the
CNT bits should be reset.
MPC561/MPC563 Reference Manual, Rev. 1.2
Table 24-12
gives a description of the register bits.
Description
READI Module
24-15