MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 1032
MPC561MZP56
Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet
1.MPC561MZP56.pdf
(1420 pages)
Specifications of MPC561MZP56
Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant
Available stocks
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Company:
Part Number:
MPC561MZP56
Manufacturer:
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Quantity:
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READI Module
24.10.3.2 Block Read Operation
For a block read access to memory-mapped locations and SPR registers, the following sequence of
operations need to be performed via the auxiliary port:
24.10.4 Read/Write Access to Internal READI Registers
24.10.4.1 Write Operation
For a write access to internal READI registers, the following sequence of operations need to be performed
via the auxiliary port:
24-64
4. Once the read access is completed, the upload/download information public message (TCODE =
5. The SC field in the RWA register is cleared.
1. The tool confirms that the device is ready before transmitting download request public message
2. The download request public message contains:
3. Data read from the specified address is stored in the UDI register.
4. After the completion of this read operation, the upload/download information public message
5. The specified address (in RWAD field) is incremented to the next word size and the number in the
6. The data read from the new address is stored in the UDI register.
7. Steps 4 through 7 are repeated until the count value in the CNT field of RWA register equals zero.
1. The tool confirms that the device is ready before transmitting download request public message
19) is transmitted to the tool along with the data read from the UDI register. This message also
indicates that the device is ready for next access.
(TCODE = 18).
a) TCODE(18)
b) Access opcode 0xF which signals that subsequent data needs to be stored in the RWA register.
c) Configure the RWA fields as follows:
(TCODE=19) is transmitted to the tool along with the data read from the UDI register. This
message also indicates that the device is ready to perform the next read operation.
CNT field is decremented. The SC field is not cleared.
The SC bit is cleared to indicate end of the block read access.
(TCODE = 18).
– Start/complete (1 to indicate start access) -> SC
– Read/write address (starting read address of block) -> RWAD
– Read/write (0 to indicate a read access) -> RW
– Word size (32 bits, 16 bits, 8 bits) -> SZ
– Write data (0xXXXXXXXX-> WD [don’t care])
– Privilege (user data/instruction, supervisor data/instruction) > PRV
– Map select (select memory map 0b0) -> MAP
– Access count (non-zero number to indicate block access) -> CNT
MPC561/MPC563 Reference Manual, Rev. 1.2
Freescale Semiconductor
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