MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 523

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

Situations S8 and S9
set to a one. When the RES bit is set, following suspension, queue 2 resumes execution with the aborted
CCW, not the first CCW in the queue.
Freescale Semiconductor
Q1
Q2
QS
QS
Q1
Q2
0000
IDLE
Q2:
IDLE
T2
IDLE
0000
(Figure 13-34
C1
IDLE
ACTIVE
0010
C2
Q1:
Q1:
T1
SUSPEND
T1
C1
ACTIVE
MPC561/MPC563 Reference Manual, Rev. 1.2
Figure 13-33. CCW Priority Situation 7
Figure 13-34. CCW Priority Situation 8
1010
C1
ACTIVE
and
1000
C2
PF1
C2
Figure
PF1
C1
ACTIVE
0100
0110
Q2:
PAUSE
13-35) repeat the same two situations with the resume bit
C2
T2
PAUSE
PF2
C1
ACTIVE
PAUSE
0110
0101
C2
T2
ACT
0110
C3
T1
SUSPEND
C3
T1
ACTIVE
ACTIVE
SUSPEND
1010
C3
ACTIVE
1010
C4
CF1
C4
CF1
C2
ACTIVE
C3
ACTIVE
0010
0010
C3
C4
QADC64E Legacy Mode Operation
C4
CF2
IDLE
IDLE
CF2
RESUME=0
RESUME=1
IDLE
0000
IDLE
0000
QADC S8
QADC S7
13-59