MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 397

MPC561MZP56

Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet

Specifications of MPC561MZP56

Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant

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Both read and write data show cycles have the following characteristics: (see
Freescale Semiconductor
I
ADDR[8:31]
(three-state)
CLKOUT
PTR
BB
RD/WR
TSIZ[0:1]
BURST
Data
TS
TA
STS
Two clock cycle duration
Address valid for two clock cycles
Data is valid only in the second clock cycle
STS signal only is asserted (no TA or TS)
“Normal” Non-Show Cycle Bus Transaction
ADDR1
Figure 9-41. Instruction Show Cycle Transaction
MPC561/MPC563 Reference Manual, Rev. 1.2
“Compressed” address on data lines
Instruction Show Cycle Bus Transaction
ADDR2
Figure
9-42)
External Bus Interface
9-57

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