MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 329

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

Figure 8-13
8.9
A special circuit for IRAMSTBY supply failure detection is provided. In the case of supply failure
detection, the dedicated sticky bits LVSRS in the VSRMCR register are asserted. Software can read or
clear these bits. The user should enable the detector and then clear these bits. If any of the LVSR bits are
read as one, then a power failure of IRAMSTBY has occurred. The circuit is capable of detecting supply
failure below a voltage level to be determined. Also, enable/disable control bit for the IRAMSTBY
detector may be used to disconnect the circuit and save the detector power consumption.
8.10
Figure 8-14
operation. Note that for each of the conditions detailing the voltage relationships the absolute bounds of
the minimum and maximum voltage supply cannot be violated; that is, the value of VDDL cannot fall
below 2.5 V or exceed 2.7 V, and the value of VDDH cannot fall below 4.75 V or exceed 5.25 V for normal
operation. Power consumption during power up sequencing will be below the operating power
consumption.
Freescale Semiconductor
SPR 268, 269,
SPR Number
Address or
0x2F C288
284, 285,
SPR 22
IRAMSTBY Supply Failure Detection
Power-Up/Down Sequencing
Write to the key other value
illustrates the process of locking or unlocking a register powered by KAPWR.
and
(Valid for other registers)
Figure 8-15
Power-On Reset
See
Decrementer
See
(DEC)” for bit descriptions.
Time Base
See
(TB),” for bit descriptions.
Reset Status Register (RSR)
KAPWR Register
Section 3.9.5, “Decrementer Register
Table 7-3
Section 6.2.2.4.2, “Time Base SPRs
Table 8-8. KAPWR Registers and Key Registers (continued)
Figure 8-13. Keep-Alive Register Key State Diagram
detail the power-up sequencing for MPC561/MPC563 during normal
for bit descriptions.
Register
MPC561/MPC563 Reference Manual, Rev. 1.2
Locked
Open
0x2F C30C Time Base and Decrementer Key (TBK)
0x2F C388
Address
Write to the Key 0x55CCAA33
Reset Status Register Key (RSRK)
Associated Key Register
(Valid for RTC, RTSEC,
RTCAL and RTCSC)
Power On Reset
Register
Clocks and Power Control
8-27