MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 1200

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

TPU3 ROM Functions
D.18 Synchronized Pulse-Width Modulation (SPWM)
The SPWM function (Bank 0) generates a pulse-width modulated waveform (PWM). The RCPU can
change the period or high time of the waveform at any time. Three different operating modes allow the
function to maintain complex timing relationships between channels without RCPU intervention.
The SPWM output waveform duty cycle excludes 0% and 100%. If it is not necessary for a PWM to
maintain a time relationship to another PWM, the PWM function should be used instead. See Freescale
TPU Progamming Note Synchronized Pulse-Width Modulation TPU Function (SPWM), (TPUPN19/D).
Figure D-29
D-48
shows all of the host interface areas for the SPWM function.
MPC561/MPC563 Reference Manual, Rev. 1.2
Figure D-28. DIO Parameters
CONTROL BITS
See
PRAM Address Offset Map.
Table 19-24
Freescale Semiconductor
for the