MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 239

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

Table 5-3
master, accessing an MPC500 SPR, address bits [0:17] and [28:31] are compared to zeros to confirm that
an SPR access is valid. See
Freescale Semiconductor
.
shows the MPC561/MPC563 address format for special purpose register access. For an external
1
Address[0:31]
Bits [0:17] and [28:31] are all 0.
Internal
0x2C00
0x3D30
0x1A80
0x3A80
0x1880
0x3880
Section 6.1.2.1, “Operation in External Master
Decrementer (DEC).
See
(DEC),” for more information.
Time Base Lower — Read (TBL).
See
for bit descriptions.
Time Base Upper — Read (TBU).
See
for bit descriptions.
Time Base Lower — Write (TBL).
SeeSee
(TB),” for bit descriptions.
Time Base Upper — Write (TBU).
See
for bit descriptions.
Internal Memory Mapping Register (IMMR).
See
Table 5-3. Hex Address Format for SPR Cycles
A[0:17]
Table 5-2. USIU Special-Purpose Registers
Section 3.9.5, “Decrementer Register
Section 6.2.2.4.2, “Time Base SPRs
Section 6.2.2.4.2, “Time Base SPRs
Section 6.2.2.4.2, “Time Base SPRs
Table 6-12
MPC561/MPC563 Reference Manual, Rev. 1.2
0
Section 6.2.2.4.2, “Time Base SPRs
for bit descriptions.
A[18:22]
Register
spr5:9
A[23:27]
spr0:4
(TB),”
(TB),”
(TB),”
A[28:31]
Unified System Interface Unit (USIU) Overview
0
Decimal Address
spr[5:9]:spr[0:4]
Modes,” for more details.
268
269
284
285
638
22
1
5-7