MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 173

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

Freescale Semiconductor
bc (bca bcl bcla)
bcctr (bcctrl)
bclr (bclrl)
cmp
cmpi
cmpl
cmpli
cntlzw (cntlzw.)
crand
crandc
creqv
crnand
crnor
cror
crorc
crxor
divw (divw. divwo divwo.)
divwu divwu. divwuo divwuo.
eieio
eqv (eqv.)
extsb (extsb.)
extsh (extsh.)
fabs (fabs.)
fadd (fadd.)
fadds (fadds.)
fcmpo
fcmpu
fctiw (fctiw.)
fctiwz (fctiwz.)
fdiv (fdiv.)
fdivs (fdivs.)
fmadd (fmadd.)
Mnemonic
Table 3-17. Instruction Set Summary (continued)
MPC561/MPC563 Reference Manual, Rev. 1.2
BO,BI,target_addr
BO,BI
BO,BI
crfD,L,rA,rB
crfD,L,rA,SIMM
crfD,L,rA,rB
crfD,L,rA,UIMM
rA,rS
crbD,crbA,crbB
crbD,crbA, crbB
crbD,crbA, crbB
crbD,crbA,crbB
crbD,crbA,crbB
crbD,crbA,crbB
crbD,crbA, crbB
crbD,crbA,crbB
rD,rA,rB
rD,rA,rB
rA,rS,rB
rA,rS
rA,rS
frD,frB
frD,frA,frB
frD,frA,frB
crfD,frA,frB
crfD,frA,frB
frD,frB
frD,frB
frD,frA,frB
frD,frA,frB
frD,frA,frC,frB
Operand Syntax
—
Branch Conditional to Count Register
Branch Conditional
Branch Conditional to Link Register
Compare
Compare Immediate
Compare Logical
Compare Logical Immediate
Count Leading Zeros Word
Condition Register AND
Condition Register AND with Complement
Condition Register Equivalent
Condition Register NAND
Condition Register NOR
Condition Register OR
Condition Register OR with Complement
Condition Register XOR
Divide Word
Divide Word Unsigned
Enforce In-Order Execution of I/O
Equivalent
Extend Sign Byte
Extend Sign Half Word
Floating Absolute Value
Floating Add (Double-Precision)
Floating Add Single
Floating Compare Ordered
Floating Compare Unordered
Floating Convert to Integer Word
Floating Convert to Integer Word with Round
Toward Zero
Floating Divide (Double-Precision)
Floating Divide Single
Floating Multiply-Add (Double-Precision)
Name
Central Processing Unit
3-29