MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 871

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

Freescale Semiconductor
1 The value of FLASHID could change to show a revision of the UC3F module.
HRESET
HRESET
Bits
0:1
2:3
Field
Field
Addr
MSB
SBSUPV
16
0
1
0
Name
SBEN
SBEN
Figure 21-3. UC3FMCRE— UC3F EEPROM Extended Configuration Register
MEMSIZ
17
0
0
1
Small block enable. When SBEN[M]=0, the corresponding small block M behaves logically as if
the small block is still part of the larger host block. In addition, the small block protect bit
(SBPROTECT[M]), the small block supervisor bit (SBSUPV[M]), the small block data bit
(SBDATA[M]), and the small block BLOCK bit (SBBLOCK[M]) corresponding to small block M
have no effect. The corresponding small block is controlled by the same protect, supervisor,
data, and block bits that control its host block.
When SBEN[M] = 1, the corresponding small block M can be programmed and erased
independently of its host block. The corresponding small block protect bit, the small block
supervisor bit, the small block data bit, and the small block bit are enabled by SBEN.
For example: when SBEN[0] = 0, Small Block 0 (16 Kbytes) and the residual block (48 Kbytes)
contained in the host block of Small Block 0 are programmed and erased as if the two blocks are
one large array block (64 Kbytes). When SBEN[0] = 1, small block 0 and the residual block
contained in the host block of small block 0 behave as two separate blocks, i.e. small block 0 and
the residual block in small block 0’s host block can be programmed and erased independently of
each other.
0 small block M behaves as part of the host block
1 small block M functions independent of host block
Small block supervisor space. Each small array block of the UC3F EEPROM may be mapped
into supervisor or unrestricted address space. When small array block M is mapped into
supervisor address space, SBSUPV[M] = 1, only supervisor accesses are allowed. When small
block M is mapped to unrestricted address space, SBSUPV[M] = 0, both supervisor and user
accesses are allowed.
If SBEN[M] = 0, the corresponding small block M is logically part of the host block and
SBSUPV[M] has no effect. Instead, the corresponding SUPV[M] bit will be used to determine if
the small block is mapped to Supervisor or Unrestricted address space.
Like the SUPV[0:7] bits, the SBSUPV bits are not actually used in the UC3F EEPROM module
but are used by the BIU to determine access restrictions to the UC3F array. Block addresses are
decoded in the BIU to determine which small array block is selected, and the selected small
block’s SBSUPV bit is compared with the address space attributes to determine validity of an
array access.
0 small block M is placed in unrestricted address space
1 small block M is placed in supervisor address space
18
SBSUPV
1
1
2
BLK
19
1
1
3
MPC561/MPC563 Reference Manual, Rev. 1.2
Table 21-4. UC3FMCRE Bit Descriptions
MAP
20
0
0
4
SBDATA
21
0
1
5
SBLKL
SBPROTECT
22
1
0
6
0x2F C804
23
7
1
Description
24
1
8
—
25
1
9
0_0000_0000
FLASHID
10
26
11
27
CDR3 Flash (UC3F) EEPROM
1
00_0000
12
28
BIU
13
29
14
30
LSB
15
31
21-9