MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 1369

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

Note: All delays are in system clock periods.
Freescale Semiconductor
1
2
3
MMCSM Enable to counter bus increment
(MIN)
MMCSM Enable to counter bus increment
(MAX)
Minimum output resolution depends on MMCSM and MCPSM prescaler settings.
Maximum resolution is obtained by setting CPSMPSL[3:0] =0x2 and MMCSMSCR_CP[7:0] =0xFF.
The exact timing from MMCSM enable to the pin being set depends on the timing of the MMCSMSCR register write
and the MCPSM VS_PCLK. The MMCSM enable is taken to mean the MMCSMSCR_CLS[1:0] being written to
2‘b11.
MMCSM clock pin
Counter bus[15:0]
3
3
MMCSM pin
Figure G-51. MMCSM Minimum Input Pin (Either Load or Clock) Timing Diagram
f
SYS
Figure G-52. MMCSM Clock Pin to Counter Bus Increment Timing Diagram
Characteristic
f
f
SYS
is the internal system clock for the IMB3 bus.
SYS
Table G-25. MMCSM Timing Characteristics (continued)
MPC561/MPC563 Reference Manual, Rev. 1.2
t
PCCB
t
PPER
min
A
Symbol
t
t
NOTE
MCME
MCME
A+1
t
PLO
min
4 + MCPSMSCR_PSL*
(255 - MMCSMSCR_CP)
4 + MCPSMSCR_PSL * (255 - MMCSMSCR_CP)
+ (MCPSMSCR_PSL - 1)
Min
t
min
PHI
66-MHz Electrical Characteristics
3
3
Max
G-63