MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 707

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

Following the negation of reset, the TouCAN is not synchronized with the CAN bus, and the HALT, FRZ,
and FRZACK bits in the module configuration register are set. In this state, the TouCAN does not initiate
frame transmissions or receive any frames from the CAN bus. The contents of the message buffers are not
changed following reset.
Any configuration change or initialization requires that the TouCAN be frozen by either the assertion of
the HALT bit in the module configuration register or by reset.
16.4.2
Initialization of the TouCAN includes the initial configuration of the message buffers and configuration of
the CAN communication parameters following a reset, as well as any reconfiguration which may be
required during operation. The following is a general initialization sequence for the TouCAN:
16.4.3
The transmit process includes preparation of a message buffer for transmission, as well as the internal steps
performed by the TouCAN to decide which message to transmit. This involves loading the message and
ID to be transmitted into a message buffer and then activating that buffer as an active transmit buffer. Once
this is done, the TouCAN performs all additional steps necessary to transmit the message onto the CAN
bus.
Freescale Semiconductor
1. Initialize all operation modes
2. Initialize message buffers
3. Initialize mask registers for acceptance mask as required
4. Initialize TouCAN interrupt handler
5. Negate the HALT bit in the module configuration register. At this point, the TouCAN attempts to
a) Initialize the transmit and receive pin modes in CANCTRL0
b) Initialize the bit timing parameters PROPSEG, PSEGS1, PSEG2, and RJW in CANCTRL1 and
c) Select the S-clock rate by programming the PRESDIV register
d) Select the internal arbitration mode (LBUF bit in CANCTRL1)
a) The control/status word of all message buffers must be written either as an active or inactive
b) All other entries in each message buffer should be initialized as required
a) Initialize the interrupt configuration register (CANICR) with a specific request level
b) Set the required mask bits in the IMASK register (for all message buffer interrupts), in
synchronize with the CAN bus
CANCTRL2
message buffer.
CANCTRL0 (for bus off and error interrupts), and in CANMCR for the WAKE interrupt
TouCAN Initialization
Transmit Process
In both the transmit and receive processes, the first action in preparing a
message buffer must be to deactivate the buffer by setting its code field to
the proper value. This step is mandatory to ensure data coherency.
MPC561/MPC563 Reference Manual, Rev. 1.2
NOTE
CAN 2.0B Controller Module
16-13