MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 222

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

Burst Buffer Controller 2 Module
4.5.1.1
Write access to any BBC special purpose register invalidates all BTB entries.
4.5.1.2
The BTB operation may be enabled or disabled by programming the BTEE bit in the BBCMCR register.
4.5.1.3
The BTB operation may be inhibited regarding some memory regions. The BTB caching is inhibited for
a region if the BTBINH bit is set in the region attribute register (or global region attribute register). See
4-16
Next Address
Next Address
Next Address
Next Address
Next Address
Next Address
Next Address
Next Address
Tag Register/Comparator
Tag Register/Comparator
Tag Register/Comparator
Tag Register/Comparator
Tag Register/Comparator
Tag Register/Comparator
Tag Register/Comparator
Tag Register/Comparator
BTE TAG Register File
BTB Invalidation
BTB Enabling/Disabling
BTB Inhibit Regions
To guarantee that the BTB does not contain instructions that may have been
changed, the BTB contents should be invalidated any time instruction
memory is modified.
32-bit
Instruction
Address
VDC
VDC
VDC
VDC
VDC
VDC
VDC
VDC
MPC561/MPC563 Reference Manual, Rev. 1.2
V
V
V
V
V
V
V
V
Figure 4-5. BTB Block Diagram
Hit
Hit
Hit
Hit
Hit
Hit
Hit
Hit
NOTE
BTB Hit
BTE Memory Array
Instruction Buffers
Instruction Buffers
Instruction Buffers
Instruction Buffers
Instruction Buffers
Instruction Buffers
Instruction Buffers
Instruction Buffers
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