MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 864

MPC561MZP56

Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet

Specifications of MPC561MZP56

Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant

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CDR3 Flash (UC3F) EEPROM
The UC3F EEPROM module array is divided into array blocks to allow for independent erase, address
attributes restrictions, and protection from program and erase for each array block. The size of a large array
block in the UC3F module is fixed at 64 Kbytes. The size of a subdivided large block becomes the original
large array block size minus 16 Kbytes (64 Kbytes – 16 Kbytes = 48 Kbytes). The size of the small block,
which is the remainder of the large block, is always 16 Kbytes. The total UC3F EEPROM array is
distributed into eight large blocks, two of which contain small blocks. Information is transferred to the
UC3F EEPROM by long-word (64 bits), word (32 bits), half-word (16 bits), or byte (8 bits).
To improve system performance, each array read access retrieves 32 bytes of information. These 32 bytes
may be copied into one of two read page buffers aligned to the low order addresses. The two read page
buffers are independently updated by page management logic contained in the BIU which interfaces to the
UC3F EEPROM module.
21-2
B0EPEE
VFLASH
EPEE
VDDF
VSSF
U-Bus
Figure 21-1. Block Diagram for a 512 Kbyte UC3F Module Configuration
Memory Interface (MI)
Internal
Timer
MPC561/MPC563 Reference Manual, Rev. 1.2
Program/Erase
Read Control
Program/Erase
Control
Generation
Voltage
Bus Interface Unit (BIU)
UC3F Array Core
Register
Block
Pgm Data
Block 0 (16 Kbytes + 48 Kbytes)
Block 1 (48 Kbytes + 16 Kbytes)
Block 2 (64 Kbytes)
Block 3 (64 Kbytes)
Block 4 (64 Kbytes)
Block 5 (64 Kbytes)
Block 6 (64 Kbytes)
Block 7 (64 Kbytes)
Latch
Column Decode
Data Mux
Read Page Buffer 0
Read Page Buffer 1
Freescale Semiconductor

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