MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 274

MPC561MZP56

Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet

Specifications of MPC561MZP56

Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant

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1
System Configuration and Protection
6.2.2.2.5
6-34
SRESET
SRESET
IRQ0 of the SIPEND2 register is not affected by the setting or clearing of the IRQ0 bit of the SIMASK2 register. IRQ0 is a
non-maskable interrupt
1
SRESET
SRESET
Field IRQ0
Field IMB
Addr
IRQ0 of the SIPEND register is not affected by the setting or clearing of the IRM0 bit of the SIMASK register. IRQ0 is a
non-maskable interrupt.
Field IRM0
Field
Addr
IRQ10
MSB
16
0
MSB
1
16
0
SIU Interrupt Mask Register 2 (SIMASK2)
LVL0
IRQ1
IMB
1
17
1
1
LVM0 IRM1 LVM1 IRM2 LVM2 IRM3 LVM3 IRM4 LVM4 IRM5 LVM5 IRM6 LVM6 IRM7 LVM7
17
1
IRQ0
IRQ3 LVL3
IMB
18
2
18
2
Figure 6-19. SIU Interrupt Mask Register 2 (SIMASK2)
IRQ1
IMB
19
3
Figure 6-18. SIU Interrupt Mask Register (SIMASK)
19
3
IRQ12
MPC561/MPC563 Reference Manual, Rev. 1.2
IRQ2
IMB
IMB
20
4
20
4
IRQ13
IRQ3
IMB
IMB
21
5
21
5
IRQ14
IRQ1
IMB
0000_0000_0000_0000
0000_0000_0000_0000
0000_0000_0000_0000
0000_0000_0000_0000
22
22
6
6
0x2F C014
IRQ15
0x2F C048
LVL1
IMB
23
7
23
7
IRQ4
IRQ4 LVL4
24
IMB
8
24
8
IRQ5
25
IMB
9
25
9
IRQ16
10
26
IRQ6
IMB
IMB
10
26
11
27
IRQ17
IRQ7
IMB
IMB
11
27
12
28
IRQ18
IRQ2
IMB
Freescale Semiconductor
12
28
13
29
IRQ19
LVL2
IMB
13
29
14
30
IRQ8
IRQ5 LVL5
IMB
14
30
LSB
15
31
IRQ9
IMB
LSB
15
31

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