MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 555

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

Port A signals are referred to as PQA[7:0] when used as 8-bit general-purpose digital input or output
signals. It is configured as a digital input or digital output using the data direction register, DDRQA. When
Port A is configured as an input, a read of the PORTQA register returns the actual PQA[7:0] signal values.
When Port A is configured as an output, the contents of port register PQA are driven on the port A signals.
Port A can also be used as analog inputs AN[59:52] and external multiplexer address outputs MA[2:0].
Port B signals are referred to as PQB[7:0] when used as 8-bit general-purpose digital input or output
signals. It is configured as a digital input or digital output using the data direction register, DDRQB. When
Port B is configured as an input, a read of the PORTQB register returns the actual PQB[7:0] signal values.
When Port B is configured as an output, the contents of port register PQB are driven on the port B signals.
Port B can also be used as non-multiplexed analog inputs AN[51:44]. In external multiplexed mode four
signals can be used as multiplexer analog inputs, ANw, ANx, ANy, ANz.
During a port data register read, the actual value of the signal is reported when its corresponding bit in the
data direction register defines the signal to be an input. When the data direction bit specifies the signal to
be an output, the content of the port data register is read. PORTQA and PORTQB are not initialized by
reset..
14.3.4
The port data direction registers (DDRQA and DDRQB) are associated with the Port A and Port B digital
I/O signals. Refer to
this register configures the corresponding signal as an output. Any bit cleared to zero in this register
Freescale Semiconductor
SRESET
Field PQA7 PQA6 PQA5 PQA4 PQA3 PQA2 PQA1 PQA0 PQB7 PQB6 PQB5 PQB4 PQB3 PQB2 PQB1 PQB0
Addr
Bits
8:15
0:7
ANALOG CHANNEL:
MULTIPLEXED ANALOG INPUTS:
AN59 AN58 AN57 AN56 AN55 AN54 AN53 AN52
MULTIPLEXED ADDRESS OUTPUTS:
MSB
0
Port Data Direction Register
PQA[7:0]
PQB[7:0]
Name
Figure 14-7. Port A Data Register (PORTQA), Port B Data Register (PORTQB)
1
(PORTQA) 0x30 4806; 0x30 4C06
Appendix F, “Electrical
Port A signals are referred to as PQA when used as an 8-bit input/output port. Port A can also
be used for analog inputs (AN[59:52]), and external multiplexer address outputs (MA[2:0]).
Port B signals are referred to as PQB when used as an 8-bit input/output port. Port B can also
be used for non-mulitplexed (AN[51:44]) and multiplexed (ANz, ANy, ANx, ANw) analog inputs.
2
Undefined
3
Table 14-8. PORTQA, PORTQB Bit Descriptions
MPC561/MPC563 Reference Manual, Rev. 1.2
4
MA2
5
Characteristics,” for more information. Any bit set to one in
MA1
6
MA0
7
Description
AN51 AN50 AN49 AN48 AN47 AN46 AN45 AN44
8
9
(PORTQB) 0x30 4807; 0x30 4C07
10
QADC64E Enhanced Mode Operation
Undefined
11
ANz
12
ANy
13
ANx
14
ANw
14-13
LSB
15