MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 1190

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

TPU3 ROM Functions
D.13 Period/Pulse-Width Accumulator (PPWA)
The period/pulse-width accumulator (PPWA) algorithm accumulates a 16-bit or 24-bit sum of either the
period or the pulse width of an input signal over a programmable number of periods or pulses (from one
to 255). After an accumulation period, the algorithm can generate a link to a sequential block of up to eight
channels. The user specifies a starting channel of the block and number of channels within the block.
Generation of links depends on the mode of operation.
Any channel can be used to measure an accumulated number of periods of an input signal. A maximum of
24 bits can be used for the accumulation parameter. From one to 255 period measurements can be made
and summed with the previous measurement(s) before the TPU3 interrupts the RCPU, allowing
instantaneous or average frequency measurement, and the latest complete accumulation (over the
programmed number of periods).
The pulse width (high-time portion) of an input signal can be measured (up to 24 bits) and added to a
previous measurement over a programmable number of periods (one to 255). This provides an
instantaneous or average pulse-width measurement capability, allowing the latest complete accumulation
(over the specified number of periods) to always be available in a parameter.
By using the output compare function in conjunction with PPWA, an output signal can be generated that
is proportional to a specified input signal. The ratio of the input and output frequency is programmable.
One or more output signals with different frequencies, yet proportional and synchronized to a single input
signal, can be generated on separate channels. See Freescale TPU Progamming Note Period/Pulse-Width
Accumulator TPU Function (PPWA), (TPUPN11/D).
Figure D-24
D-38
shows the host interface areas and parameter RAM for the PPWA function.
NAME
Figure D-23. FQD Parameters — Secondary Channel
MPC561/MPC563 Reference Manual, Rev. 1.2
CONTROL BITS
OPTIONS
See
PRAM Address Offset Map.
Table 19-24
ADDRESSES
Freescale Semiconductor
for the