MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 616

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

QADC64E Enhanced Mode Operation
14.6.5.4
Positive or negative stress refers to conditions which exceed nominally defined operating limits. Examples
include applying a voltage exceeding the normal limit on an input (for example, voltages outside of the
suggested supply/reference ranges) or causing currents into or out of the signal which exceed normal
limits. QADC64E specific considerations are voltages greater than V
an analog input which cause excessive currents into or out of the input. Refer to
Characteristics,” to for more information on exact magnitudes.
Either stress condition can potentially disrupt conversion results on neighboring inputs. Parasitic devices,
associated with CMOS processes, can cause an immediate disruptive influence on neighboring signals.
Common examples of parasitic devices are diodes to substrate and bipolar devices with the base terminal
tied to substrate (V
cause errors on the selected channel by developing a voltage drop across the selected channel’s
impedances.
Figure 14-52
stress conditions.
14-74
shows an active parasitic bipolar NPN transistor when an input signal is subjected to negative
Accommodating Positive/Negative Stress Conditions
Leakage from the part below 200 nA is obtainable only within a limited
temperature range.
Impedance
Source
100 kΩ
10 kΩ
Figure 14-53
1 kΩ
SSI
/V
SSA
Table 14-26. Error Resulting From Input Leakage (IOFF)
Figure 14-52. Input Signal Subjected to Negative Stress
ground). Under stress conditions, current injected on an adjacent signal can
V
IN
V
shows positive stress conditions can activate a similar PNP transistor.
+
0.2 counts
STRESS
2 counts
MPC561/MPC563 Reference Manual, Rev. 1.2
100 nA
—
R
R
SELECTED
STRESS
Leakage Value (10-bit Conversions)
10K
WARNING
0.4 counts
200 nA
4 count
I
INJN
I
—
IN
PARASITIC
ANn+1
ANn
DEVICE
Signal Under
Adjacent
Stress
Signal
0.1 counts
10 counts
1 counts
500 nA
DDA
, V
RH
or less than V
Appendix F, “Electrical
QADC64E PAR
0.2 counts
20 counts
1000 nA
2 counts
Freescale Semiconductor
SSA
applied to