MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 989

MPC561MZP56

Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet

Specifications of MPC561MZP56

Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC561MZP56
Manufacturer:
FREESCALE
Quantity:
852
Part Number:
MPC561MZP56
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC561MZP56
Manufacturer:
FREESCALE
Quantity:
852
Company:
Part Number:
MPC561MZP56
Quantity:
13
Part Number:
MPC561MZP56R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
24.7.1
The READI signal interface provides the function of transmitting messages from the message queues to
the external tools. The signal interface also provides the control for timing and logic for formatting the
messages.
24.7.1.1
The READI module implements one MCKO, MCKI, EVTI, RSTI, MSEO, and MSEI signal. It also
implements one or two MDI and two or eight MDO signals. The input signals are synchronized to the
MCKI input clock and the output signals are synchronized to the free running MCKO output clock. The
MCKI input clock should be synchronised to the MCKO ouput clock to ensure correct message reception.
The READI signal definition is outlined in
Freescale Semiconductor
5001 Signal
MDO[7:0] or
IEEE-ISTO
MDO[1:0]
MDI[1:0]
MCKO
MSEO
Name
MCKI
MDI0
MSEI
RSTI
EVTI
or
Functional Description
Signals Implemented
MCKI clock frequency has to be less than or equal to one half of MCKO
clock frequency.
Output
Output
Output
Output
Input/
Input
Input
Input
Input
Input
Message Clock-Out (MCKO) is a free-running output clock to development tools for timing of
MDO and MSEO signal functions. MCKO is the same as the MCU system clock.
Message Data Out (MDO[7:0] or MDO[1:0]) are output signals used for uploading OTM, BTM,
DTM, and Read/Write Accesses. External latching of MDO will occur on rising edge of MCKO.
Eight signals are implemented. MDO[7:0] are used in full port mode, MDO[1:0] are used in
reduced port mode.
Message Start/End Out (MSEO) is an output signal which indicates when a message on the
MDO signals has started, when a variable length packet has ended, and when the message
has ended. 1 MSEO signal is implemented. External latching of MSEO will occur on rising
edge of MCKO.
Message Clock-In (MCKI) is a input clock from development tools for timing of MDI and MSEI
signal functions. MCKI frequency has to be less than or equal to one half of MCKO frequency.
Message Data In (MDI[1:0] or MDI[0]) are input signals used for downloading configuration
information, writes to user resources, etc. Internal latching of MDI will occur on rising edge of
MCKI. Two signals are implemented on the MPC561/MPC563. MDI[1:0] are used in full port
mode, MDI[0] only is used in reduced port mode.
Message Start/End In (MSEI) is an input signal which indicates when a message on the MDI
signals has started, when a variable length packet has ended, and when the message has
ended. 1 MSEI signal is implemented. Internal latching of MSEI will occur on rising edge of
MCKI.
Event In (EVTI) — The EVTI signal is level sensitive when configured for breakpoint
generation, otherwise it is edge sensitive.
Reset In (RSTI).
Table 24-17. Description of READI Signals
MPC561/MPC563 Reference Manual, Rev. 1.2
Table
NOTE
24-17.
Description of Signal
READI Module
24-21

Related parts for MPC561MZP56