MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 1010

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DMA Controller
15.4
This section describes the function of the DMA controller.
15.4.1
All DMA channels support two different modes of operation: a basic mode (MRn[XFE] is cleared) and an
extended mode (MRn[XFE] is set). In both modes, a channel can be activated by clearing and setting
MRn[CS], or through the single-write start mode using MRn[CDSM/SWSM] and MRn[SRW], or through
an external control mode using MRn[ECS_EN].
15-24
Bits
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
EOLNI1
EOLSI1
EOLNI2
EOLSI2
EOLNI3
EOLSI3
Functional Description
EOSI1
EOSI2
EOSI3
Name
CH1
CB1
CH2
CB2
CH3
CB3
PE1
TE2
PE2
TE3
PE3
—
—
DMA Channel Operation
Channel halted, channel 1
Programming error, channel 1
End-of-links interrupt, channel 1
Channel busy, channel 1
End-of-segment interrupt, channel 1
End-of-lists/direct interrupt, channel 1
Transfer error, channel 2
0 Normal operation
1 An error condition occurred during the DMA transfer.
Reserved
Channel halted, channel 2
Programming error, channel 2
End-of-links interrupt, channel 2
Channel busy, channel 2
End-of-segment interrupt, channel 2
End-of-lists/direct interrupt, channel 2
Transfer error, channel 3
0 Normal operation
1 An error condition occurred during the DMA transfer.
Reserved
Channel halted, channel 3
Programming error, channel 3
End-of-links interrupt, channel 3
Channel busy, channel 3
End-of-segment interrupt, channel 3
End-of-lists/direct interrupt, channel 3
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Table 15-22. DGSR Field Descriptions (continued)
Description
Freescale Semiconductor