MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 4

BOARD DEV SYSTEM MPC8536E

MPC8536DS

Manufacturer Part Number
MPC8536DS
Description
BOARD DEV SYSTEM MPC8536E
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets

Specifications of MPC8536DS

Contents
Board, Software and Documentation
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
667 MHz
Operating Supply Voltage
- 0.3 V to + 1.21 V
Maximum Operating Temperature
+ 105 C
Data Ram Size
32 KB
Interface Type
SPI, USB
Program Memory Type
DDR2, DDR3, SDRAM
Core Size
32 Bit
Program Memory Size
544KB
Cpu Speed
1.5GHz
Digital Ic Case Style
BGA
No. Of Pins
783
Supply Voltage Range
0.95V To 1.05V
Rohs Compliant
Yes
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Paragraph
Number
1.3.12
1.3.13
1.3.14
1.4
1.4.1
1.4.2
1.4.3
1.4.4
2.1
2.2
2.2.1
2.2.2
2.2.3
2.2.3.1
2.2.3.2
2.2.3.3
2.2.3.4
2.2.3.5
2.2.3.6
2.2.3.7
2.2.3.8
2.2.3.9
2.2.4
2.2.5
2.2.5.1
2.2.5.2
2.2.5.3
2.3
2.3.1
2.3.2
2.3.3
2.3.4
2.3.5
2.3.6
2.4
iv
MPC8536E Application Examples ................................................................................ 1-11
Local Memory Map Overview and Example .................................................................. 2-1
Address Translation and Mapping ................................................................................... 2-3
Configuration, Control, and Status Register Map.......................................................... 2-10
Complete CCSR Map .................................................................................................... 2-14
eSPI Interface............................................................................................................... 1-8
Serial ATA (SATA) Controllers ................................................................................... 1-9
DMA Controller, I
Multi-Function Printer ............................................................................................... 1-11
Network Attached Storage......................................................................................... 1-12
Gaming Kiosk ............................................................................................................ 1-13
Network Controller .................................................................................................... 1-14
SRAM Windows.......................................................................................................... 2-4
Window into Configuration Space............................................................................... 2-4
Local Access Windows................................................................................................ 2-4
Outbound Address Translation and Mapping Windows.............................................. 2-9
Inbound Address Translation and Mapping Windows .............................................. 2-10
Accessing CCSR Memory from the Local Processor................................................ 2-11
Accessing CCSR Memory from External Masters .................................................... 2-11
Organization of CCSR Memory ................................................................................ 2-11
General Utilities Registers ......................................................................................... 2-12
Interrupt Controller and CCSR .................................................................................. 2-13
Device-Specific Utilities............................................................................................ 2-13
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Local Access Register Memory Map ...................................................................... 2-5
Local Access IP Block Revision Register 1 (LAIPBRR1)...................................... 2-6
Local Access IP Block Revision Register 2 (LAIPBRR2)...................................... 2-6
Local Access Window n Base Address Registers (LAWBAR0–LAWBAR9)........ 2-7
Local Access Window n Attributes Registers (LAWAR0–LAWAR9) .................... 2-7
Precedence of Local Access Windows .................................................................... 2-8
Configuring Local Access Windows ....................................................................... 2-8
Distinguishing Local Access Windows from Other Mapping Functions ................ 2-9
Illegal Interaction Between Local Access Windows and DDR
PCI Inbound ATMU .............................................................................................. 2-10
PCI Express Inbound ATMU................................................................................. 2-10
Illegal Interaction Between Inbound ATMUs and Local Access Windows .......... 2-10
SDRAM Chip Selects.......................................................................................... 2-9
2
C, DUART, eLBC ........................................................................ 1-9
Contents
Memory Map
Chapter 2
Title
Freescale Semiconductor
Number
Page

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