MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 1223

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

18.3.1.4
The eSPI command register (SPCOM), shown in
the new frame.
After SPCOM has been written to initiate the first transaction after startup, commands can be executed
only after SPIE[DON] is set. Otherwise they are ignored.
Table 18-7
Freescale Semiconductor
Offset 0x00C
Reset
16–31 TRANLEN Transaction length – (number of characters in the frame – 1)
8–15
Bits
0–1
6–7
W CS RxDelay DO TO
R
2
3
4
5
0
1
RxDelay
RxSKIP
Name
describes the SPCOM fields.
HLD
DO
CS
TO
—
eSPI Command Register (SPCOM)
2
Chip select—chip select for which transaction is destined
00 SPI_CS0
01 SPI_CS1
10 SPI_CS2
11 SPI_CS3
0 Normal eSPI operation
1 Rx data should be sampled a bit later than regular eSPI (used for full cycle operation such as with
0 Normal eSPI operation
1 Winbond dual output read—when eSPI master reads data 2 data bits are available (on MISO and
This mode is usefull only for character lengths of 4,6,8 .
DO and RapidS should not be set simultaneously.
Transmit only
1 No reception is done for the frame (usefull for write transactions)
0 Normal operation
0 Normal operation
1 Mask first generated SPI_CLK. Should be used only for RapidS mode0
If (RXSKIP != 0)—Number of characters skipped for reception from frame start.
Non-zero values of RxSKIP force the eSPI to half-duplex mode, and therefore this causes
TRANLEN–RxSKIP characters to be skipped for transmission.
RXSKIP is useful for reads of SPI Flash memories where the first valid read data is received several
characters after the transmission begins (after the eSPI has transmitted an instruction opcode and
address).
Note: If TO=1 RxSKIP is ignored.
If RXSKIP=0 and TO=0, the eSPI changes to full duplex mode.
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Reserved, should be cleared.
3
Atmel RapidS devices)
MOSI)
4
Figure 18-6. eSPI Command Register (SPCOM)
HLD
5
Table 18-7. SPCOM Field Descriptions
6
—
7
8
RxSKIP
Figure
All zeros
Description
18-6, is used by the host to supply information on
15 16
Enhanced Serial Peripheral Interface
TRANLEN
Access: Write only
18-9
31