MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 1302

Manufacturer Part Number

BOARD DEV SYSTEM MPC8536E

Manufacturer

Freescale Semiconductor

PowerQUICC III™r

Board, Software and Documentation

Processor Series

Data Bus Width

Maximum Clock Frequency

Operating Supply Voltage

- 0.3 V to + 1.21 V

Maximum Operating Temperature

Data Ram Size

Interface Type

Program Memory Type

DDR2, DDR3, SDRAM

Program Memory Size

Digital Ic Case Style

Supply Voltage Range

0.95V To 1.05V

Rohs Compliant

For Use With/related Products

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

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Enhanced Secure Digital Host Controller

The eSDHC may sample the card interrupt signal during the interrupt period

and hold its value in the flip-flop. As a result of synchronization, there is a

delay in the card interrupt (which is asserted from the card) to the time the

host system is informed.

To detect a SDHC_CMD line conflict, the host driver must set both

CTOESEN and CCESEN bits.

Command timeout error status enable

Card interrupt status enable. If this bit is cleared, the eSDHC clears the interrupt request to the system. The

card interrupt detection is stopped when this bit is cleared and restarted when this bit is set. To prevent

inadvertent interrupts, the host driver should clear this bit before servicing the card interrupt and should set

this bit again after all interrupt requests from the card are cleared.

Card removal status enable

Card insertion status enable

Buffer read ready status enable

Buffer write ready status enable

DMA interrupt status enable

Block gap event status enable

Transfer complete status enable

Command complete status enable

MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1

Table 20-18. IRQSTATEN Field Descriptions (continued)

Freescale Semiconductor

MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 1302

MPC8536DS

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