MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 1031

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

16.1.3.1
The PCI controller can function as either a PCI host bridge (referred to as host mode) or a peripheral device
on the PCI bus (referred to as agent mode). Additionally, the PCI controller can operate in agent
configuration lock mode. Note that host/agent mode selection is determined at power-up.
16.1.3.1.1
When the device powers up in host mode, all inbound configuration accesses are ignored (and thus master
aborted). See
16.1.3.1.2
When the device powers up in agent mode, it acknowledges inbound configuration accesses. See
Section 16.5.1.2, “Agent Mode,”
ignores all PCI memory accesses except those to the memory-mapped registers) until inbound address
translation is enabled.
16.1.3.1.3
When the device powers up in agent configuration lock mode, it retries inbound configuration accesses
until the ACL bit in the PCI bus function register is cleared. See
Lock Mode,”
16.1.3.2
The interface can be configured to be clocked asynchronously with a PCI_CLK input or synchronously
with the SYSCLK input. The initial value for clocking is determined by a power-on reset configuration
signal.
16.1.3.3
The interface can be configured to use an on-chip or off-chip PCI arbiter. The initial value for the arbiter
is determined by a power-on reset configuration signal.
16.1.3.4
The device has a programmable impedance for PCI bus signals. The initial value for impedance is
determined by a power-on reset configuration signal.
Freescale Semiconductor
Host/agent configuration Selects between host and agent mode for the PCI interface.
PCI clocking
PCI arbiter enable
PCI I/O impedance
Parameter
Host/Agent Mode Configuration
PCI Clocking Configuration
PCI Arbiter (Internal/External Arbiter) Configuration
PCI Impedance Configuration
Section 16.5.1.1, “Host Mode,”
for more information.
Host Mode
Agent Mode
Agent Configuration Lock Mode
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Selects between asynchronous or synchronous clocking for PCI
Enables the on-chip PCI bus arbiter
Selects the impedance of the PCI I/O drivers
Table 16-1. POR Parameters for PCI Controller
for more information. Note that in PCI agent mode, the PCI controller
for more information.
Description
Section 16.5.1.3, “Agent Configuration
PCI Bus Interface
Section/page
16-5