MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 62

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure
Number
10-106
10-107
10-108
10-109
11-1
11-2
11-3
11-4
11-5
11-6
11-7
11-8
11-9
11-10
11-11
12-1
12-2
12-3
12-4
12-5
12-6
12-7
12-8
12-9
12-10
12-11
12-12
12-13
12-14
12-15
12-16
13-1
13-2
13-3
13-4
13-5
13-6
13-7
13-8
13-9
13-10
lxii
Base Registers (BRn) .......................................................................................................... 13-11
RNGU Status Register ...................................................................................................... 10-157
RNGU Interrupt Status Register ....................................................................................... 10-159
RNGU Interrupt Mask Register ........................................................................................ 10-160
RNGU End of Message Register ...................................................................................... 10-160
I
I
I
I
I
I
I
I
EEPROM Data Format for One Register Preload Command............................................. 11-19
EEPROM Contents ............................................................................................................. 11-20
Example I
UART Block Diagram .......................................................................................................... 12-2
Receiver Buffer Registers (URBRn)..................................................................................... 12-5
Transmitter Holding Registers (UTHRn).............................................................................. 12-6
Divisor Most Significant Byte Registers (UDMB0, UDMB1)............................................. 12-6
Divisor Least Significant Byte Registers (UDLBn) ............................................................. 12-7
Interrupt Enable Register (UIER) ......................................................................................... 12-8
Interrupt ID Registers (UIIR)................................................................................................ 12-9
FIFO Control Registers (UFCRn)....................................................................................... 12-10
Alternate Function Register (UAFR) .................................................................................. 12-11
Line Control Register (ULCR) ........................................................................................... 12-12
Modem Control Register (UMCR) ..................................................................................... 12-14
Line Status Register (ULSR) .............................................................................................. 12-15
Modem Status Register (UMSR) ........................................................................................ 12-16
Scratch Register (USCR) .................................................................................................... 12-17
DMA Status Register (UDSR) ............................................................................................ 12-17
UART Bus Interface Transaction Protocol Example .......................................................... 12-19
Enhanced Local Bus Controller Block Diagram................................................................... 13-1
Option Registers (ORn) in GPCM Mode............................................................................ 13-14
Option Registers (ORn) in FCM Mode............................................................................... 13-16
Option Registers (ORn) in UPM Mode .............................................................................. 13-19
UPM Memory Address Register (MAR) ............................................................................ 13-20
UPM Mode Registers (MxMR)........................................................................................... 13-21
Memory Refresh Timer Prescaler Register (MRTPR)........................................................ 13-23
UPM Data Register in UPM Mode (MDR) ........................................................................ 13-24
FCM Data Register in FCM Mode (MDR)......................................................................... 13-24
2
2
2
2
2
2
2
2
C Block Diagram................................................................................................................ 11-1
C Address Register (I2CADR)........................................................................................... 11-6
C Frequency Divider Register (I2CFDR) .......................................................................... 11-6
C Control Register (I2CCR)............................................................................................... 11-7
C Status Register (I2CSR) ................................................................................................. 11-9
C Data Register (I2CDR) ................................................................................................. 11-10
C Digital Filter Sampling Rate Register (I2CDFSRR).....................................................11-11
C Interface Transaction Protocol...................................................................................... 11-12
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
2
C Interrupt Service Routine Flowchart ............................................................. 11-25
Figures
Title
Freescale Semiconductor
Number
Page