MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 121

BOARD DEV SYSTEM MPC8536E

MPC8536DS

Manufacturer Part Number
MPC8536DS
Description
BOARD DEV SYSTEM MPC8536E
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets

Specifications of MPC8536DS

Contents
Board, Software and Documentation
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
667 MHz
Operating Supply Voltage
- 0.3 V to + 1.21 V
Maximum Operating Temperature
+ 105 C
Data Ram Size
32 KB
Interface Type
SPI, USB
Program Memory Type
DDR2, DDR3, SDRAM
Core Size
32 Bit
Program Memory Size
544KB
Cpu Speed
1.5GHz
Digital Ic Case Style
BGA
No. Of Pins
783
Supply Voltage Range
0.95V To 1.05V
Rohs Compliant
Yes
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Chapter 1
Overview
The MPC8536E integrates a PowerPC™ processor core with system logic required for imaging,
networking, and communications applications. The MPC8536E is a member of the PowerQUICC III™
family of devices that combine system-level support for industry-standard interfaces with processors that
implement the PowerPC architecture. This chapter provides a high-level description of features and
functionality of the MPC8536E integrated processor.
Although this chapter is written from the perspective of the MPC8536E, most of the material applies to
the MPC8535E as well. For information on differences between the MPC8535E and the MPC8536E, see
Appendix C, “MPC8535E.”
1.1
Introduction
The MPC8536E uses the e500 core and high-speed interconnect technology to balance processor
performance with I/O system throughput. The e500 core implements the enhanced Book E instruction set
architecture and provides unprecedented levels of hardware and software debugging support.
In addition, the MPC8536E offers a double-precision floating-point auxiliary processing unit (APU),
512Kbytes of level-2 cache, two integrated 10/100/1Gb enhanced three-speed Ethernet controllers
(eTSECs) with TCP/IP acceleration and classification capabilities and SGMII interface capabilities, a
DDR2/DDR3 SDRAM memory controller, a 32-bit PCI controller, a programmable interrupt controller,
an enhanced serial peripheral interface (eSPI), an enhanced secure digital host controller (eSDHC), three
2
USB dual-role controllers (host/device), two I
C controllers, a four-channel DMA controller, an enhanced
local bus controller (eLBC), an integrated security engine with XOR acceleration, a general-purpose I/O
port, and dual universal asynchronous receiver/transmitters (DUART). For high speed interconnect, the
MPC8536E provides a set of multiplexed pins that support up to three PCI Express interfaces through a
dedicated SerDes. The high level of integration in the MPC8536E helps simplify board design and offers
significant bandwidth and performance.
The MPC8536E is also available without a security engine, in a configuration known as the MPC8536. All
specifications other than those relating to security apply to the MPC8536 exactly as described in this
document.
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Freescale Semiconductor
1

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