MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 1611

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 25-23
Table 25-30
110.
Freescale Semiconductor
Reset
W
R
10–14
15–33
34–63 PEXADDR Address bits 31–2
Bits
10–11
12–31
32–63 PCIADDR Address bits 0–31
0–4
5–9
Bits
0–4
5–9
PEXTT
0
describes the fields of PCI Express trace buffer entries when TBCR1[IFSEL] = 100 or 101 or
PEXSID
4
PCISID
PEXTT
PCIBC
PCIBC
PCITT
Name
shows the PCI Express trace buffer entry format when TBCR1[IFSEL] = 100 or 101 or 110.
Name
—
PEXSID
—
5
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Transaction type. Specifies the transaction type as shown in
of all zeros maps to write.
Source ID. Identifies the source of the transaction as shown in
of 010101 identifies DMA as the transaction source.
Byte count. The size of the transaction.
00 32 bytes
01 8 bytes
10 16 bytes
11 24 bytes
Reserved
9
Table 25-30. PCI Express Trace Buffer Entry Field Descriptions
Transaction type. Specifies the transaction type as shown in
of all zeros maps to write.
Source ID. Identifies the source of the transaction as shown in
of 010101 identifies DMA as the transaction source. For responses, this corresponds to
Requestor’s ID’s bus number bits 3–7.
Byte count. The size of the transaction.
00000 4 bytes
00001 8 bytes
00010 12 bytes
...
11111 256 bytes
Reserved
10
PEXBC
Table 25-29. PCI Trace Buffer Entry Field Descriptions
14
Figure 25-23. PCI Express Trace Buffer Entry
15
(TBCR1[IFSEL] = 100 or 101 or 110)
(TBCR1[IFSEL] = 010)
—
All zeros
33
34
Function
Function
Table
Table
Table
Table
Debug Features and Watchpoint Facility
25-12. For example, a value
PEXADDR
25-26. For example, a value
25-12. For example, a value
25-26. For example, a value
25-29
63