MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 505

BOARD DEV SYSTEM MPC8536E

MPC8536DS

Manufacturer Part Number
MPC8536DS
Description
BOARD DEV SYSTEM MPC8536E
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets

Specifications of MPC8536DS

Contents
Board, Software and Documentation
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
667 MHz
Operating Supply Voltage
- 0.3 V to + 1.21 V
Maximum Operating Temperature
+ 105 C
Data Ram Size
32 KB
Interface Type
SPI, USB
Program Memory Type
DDR2, DDR3, SDRAM
Core Size
32 Bit
Program Memory Size
544KB
Cpu Speed
1.5GHz
Digital Ic Case Style
BGA
No. Of Pins
783
Supply Voltage Range
0.95V To 1.05V
Rohs Compliant
Yes
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Context for CCM Cipher Mode
The SEC AESU is capable of performing single pass encryption and MAC generation. The host is required
to order the CCM context in such a way that the context can be fetched as a contiguous string into the
context registers, prior to encryption/MAC generation or decryption/MAC validation. The context register
contents for CCM cipher mode is summarized in
Freescale Semiconductor
Table 10-31. AESU Context Registers for Modes Providing Confidentiality and Integrity (continued)
AES-CCM mode does not support zero-length AAD and zero-length
payload simultaneously. Either the AAD length or the payload length must
be at least 1 byte.
* Must be written at start of new message, except if zero
** Needed only in ICV mode—must be written at start of new CCM decryption
*** The Header and MAC Sizes are internally constructed by the AES engine; then, that
C
T
— don’t care
length of total data (in bits)
length of data processed with current descriptor (in bits)
information is included inside context register 7 for context switching purposes
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Context Register #
(byte address)
10 (0x34148)
11 (0x34150)
12 (0x34158)
3 (0x34110)
4 (0x34118)
5 (0x34120)
6 (0x34128)
7 (0x34130)
8 (0x34138)
9 (0x34140)
Cipher Mode providing Confidentiality and Integrity
Counter Modulus Exponent*
(header size/ MAC size)***
Encrypted MAC** /
Encrypted Counter
Decrypted MAC /
NOTE
Figure 10-30
Counter*
CCM
and further described below.
Received MAC**
len(AAD)
len(AAD)
Counter
len(IV)
len(IV)
GCM
Y
0
C
T
C
T
Security Engine (SEC) 3.0
10-75

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