MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 523

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Offset 0x3_8030
Reset
If the AFEU interrupt status register is non-zero, the AFEU halts and the AFEU error interrupt signal is
asserted to the controller (see
AFEU is being operated through channel-controlled access, then an interrupt signal is generated to the
channel to which this EU is assigned. The EU error then appears in bit 55 of the channel status register
(see
If the interrupt status register is written from the host, 1s in the value written are recorded in the interrupt
status register if the corresponding bit is unmasked in the interrupt mask register. All other bits are cleared.
This register can also be cleared by setting the RI bit of the AFEU reset control register.
The definition of each bit in the AFEU interrupt status register is shown in
Table 10-40
Freescale Semiconductor
W
R
Table
0
0-50
Bits
51
52
53
54
55
56
10-15) and generates a channel error interrupt to the controller.
describes AFEU interrupt status register fields.
Names
ERE
DSE
KSE
ME
CE
—
IE
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Table 10-40. AFEU Interrupt Status Register Fields
—
Reserved
Internal Error. An internal processing error was detected while performing encryption.
0 No error detected
1 Internal error
Early Read Error. The AFEU context memory or control was read while the AFEU was
performing encryption.
0 No error detected
1 Early read error
Context Error. The AFEU mode register, key register, key size register, data size
register, or context memory is modified while AFEU processes data.
0 No error detected
1 Context error
Key Size Error. A value outside the bounds 1–16 bytes was written to the AFEU key
size register
0 No error detected
1 Key size error
Data Size Error. A value that is not a multiple of 8 bits was written to the AFEU data
size register:
0 No error detected
1 Data size error
Mode Error. An illegal value was detected in the mode register. Note: writing to
reserved bits in mode register is likely source of error.
0 No error detected
1 Mode error
Section 10.5.4.2.2, “Interrupt Status Register (ISR)
Figure 10-37. AFEU Interrupt Status Register
All zeros
50 51
IE ERE CE KSE DSE ME AE OFE IFE — IFO OFU —
52
Description
53
54
55
Figure
56
57
”
). In addition, if the
10-37.
Security Engine (SEC) 3.0
58
Access: Read/Write
59 60
61
62
10-93
63