MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 1159

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

17.3.8.3.11 PCI Express Prefetchable Memory Base Register—0x24
The prefetchable memory base register is shown in
Table 17-66
17.3.8.3.12 PCI Express Prefetchable Memory Limit Register—0x26
The prefetchable memory limit register is shown in
Table 17-67
Freescale Semiconductor
Offset 0x24
Reset
Offset 0x26
Reset
W
W
R
R
15–4
15–4
15
15
Bits
Bits
3–0
3–0
describes the prefetchable memory base register fields.
describes the prefetchable memory limit register fields.
Table 17-66. PCI Express Prefetchable Memory Base Register Field Description
Table 17-67. PCI Express Prefetchable Memory Limit Register Field Description
Address Decode Type Specifies the number of prefetchable memory address bits.
Address Decode Type Specifies the number of prefetchable memory address bits.
PF Memory Base
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
PF Memory Limit
Figure 17-68. PCI Express Prefetchable Memory Base Register
Figure 17-69. PCI Express Prefetchable Memory Limit Register
Name
Name
PF Memory Base
PF Memory Limit
Specifies bits 31:20 of the prefetchable memory space start address.
0x00 32-bit memory address decode
0x01 64-bit memory address decode
All other settings reserved.
Specifies bits 31:20 of the prefetchable memory space ending address.
0x00 32-bit memory address decode
0x01 64-bit memory address decode
All other settings reserved.
Figure
Figure
All zeros
All zeros
17-68.
17-69.
Description
Description
4
4
PCI Express Interface Controller
3
3
Address Decode Type
Address Decode Type
Access: Read/Write
Access: Read/Write
17-63
0
0