MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 584

BOARD DEV SYSTEM MPC8536E

MPC8536DS

Manufacturer Part Number
MPC8536DS
Description
BOARD DEV SYSTEM MPC8536E
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets

Specifications of MPC8536DS

Contents
Board, Software and Documentation
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
667 MHz
Operating Supply Voltage
- 0.3 V to + 1.21 V
Maximum Operating Temperature
+ 105 C
Data Ram Size
32 KB
Interface Type
SPI, USB
Program Memory Type
DDR2, DDR3, SDRAM
Core Size
32 Bit
Program Memory Size
544KB
Cpu Speed
1.5GHz
Digital Ic Case Style
BGA
No. Of Pins
783
Supply Voltage Range
0.95V To 1.05V
Rohs Compliant
Yes
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Security Engine (SEC) 3.0
10.7.7.9
The PKEU end of message register in the PKEU is used to indicate the start of a new computation. Writing
to this register causes the PKEU to execute the function requested by the ROUTINE field, according to the
contents of the parameter memories described in
The value written to this register does not matter: ordinarily, all zeros are written. A read of this register
always returns a zero value.
Offset 0x3_C050
10.7.7.10 PKEU Parameter Memories
The PKEU uses four 4096-bit memories to receive and store operands for the arithmetic operations the
PKEU is asked to perform. In addition, results are stored in one particular parameter memory.
Data addressing within these memories is big-endian, that is, the most significant byte is stored in the
lowest address.
10.7.7.10.1 PKEU Parameter Memory A
This 4096 bit memory is used typically as an input parameter memory space. For modular arithmetic
routines, this memory operates as one of the operands of the desired function. For elliptic curve routines,
this memory is segmented into four 1024 bit memories, and is used to specify particular curve parameters
and input values.
10-154
Reset
W
R
58-63
Bits
0
54
55
56
57
PKEU End of Message Register
Table 10-71. PKEU Interrupt Mask Register Field Descriptions (continued)
Name
KSE
DSE
ME
AE
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Key size error
0 Key size error enabled
1 Key size error disabled
Data size error
0 Data size error enabled
1 Data size error disabled
Mode error
0 Mode error enabled
1 Mode error disabled
Address error
0 Address error enabled
1 Address error disabled
Reserved
Figure 10-102. PKEU End of Message Register
Section 10.7.7.10, “PKEU Parameter
All zeros
Description
Freescale Semiconductor
Memories”.
Access: Write only
63

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