MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 1464

BOARD DEV SYSTEM MPC8536E

MPC8536DS

Manufacturer Part Number
MPC8536DS
Description
BOARD DEV SYSTEM MPC8536E
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets

Specifications of MPC8536DS

Contents
Board, Software and Documentation
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
667 MHz
Operating Supply Voltage
- 0.3 V to + 1.21 V
Maximum Operating Temperature
+ 105 C
Data Ram Size
32 KB
Interface Type
SPI, USB
Program Memory Type
DDR2, DDR3, SDRAM
Core Size
32 Bit
Program Memory Size
544KB
Cpu Speed
1.5GHz
Digital Ic Case Style
BGA
No. Of Pins
783
Supply Voltage Range
0.95V To 1.05V
Rohs Compliant
Yes
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Universal Serial Bus Interfaces
21.8.3.4
The behaviors of the device controller for interrupt and bulk endpoints are identical. All valid IN and OUT
transactions to bulk pipes will handshake with a NAK unless the endpoint had been primed. Once the
endpoint has been primed, data delivery will commence.
A dTD will be retired by the device controller when the packets described in the transfer descriptor have
been completed. Each dTD describes N packets to be transferred according to the USB Variable Length
transfer protocol. The formula and table on the following page describe how the device controller
computes the number and length of the packets to be sent/received by the USB vary according to the total
number of bytes and maximum packet length.
With Zero Length Termination (ZLT) = 0
With Zero Length Termination (ZLT) = 1
TX-dTD is complete when:
RX-dTD is complete when:
21-130
All packets described dTD were successfully transmitted. *** Total bytes in dTD will equal zero
when this occurs.
All packets described in dTD were successfully received. *** Total bytes in dTD will equal zero
when this occurs.
N = INT(number of bytes/max. packet length) + 1
N = MAXINT(number of bytes/max. packet length)
Interrupt/Bulk Endpoint Operational Model
The MULT field in the dQH must be set to ‘00’ for bulk, interrupt, and
control endpoints.
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Table 21-85. Variable Length Transfer Protocol Example (ZLT = 0)
Table 21-86. Variable Length Transfer Protocol Example (ZLT = 1)
Bytes
Bytes
(dTD)
(dTD)
511
512
512
511
512
512
Max. Packet
Max. Packet
Length
Length
(dQH)
(dQH)
256
256
512
256
256
512
N
N
2
3
2
2
2
1
NOTE
256
256
512
256
256
512
P1
P1
255
256
255
256
P2
P2
0
P3
P3
0
Freescale Semiconductor

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