MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 1359

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

21.3.2.14 Port Status and Control Register (PORTSC)
The port status and control (PORTSC) register is only reset when power is initially applied or in response
to a controller reset. The initial conditions of a port are:
If the port has port power control, this state remains until software applies power to the port by setting port
power to one.
In device mode, the USB controller does not support power control. Port control in device mode is only
used for status port reset, suspend, and current connect status. It is also used to initiate test mode or force
signaling and allows software to put the PHY into low power suspend mode and disable the PHY clock.
Freescale Semiconductor
31–30
27–26 PSPD Port speed. This read-only register field indicates the speed at which the port is operating.
Bits
29
28
25
•
•
Offset 0x184
Reset 1
Reset 0
No device connected
Port disabled
Name
PTS
W
W
—
—
—
R
R
31
15
PTS
PIC
Port transceiver select. This register bit is used to control which parallel transceiver interface is selected.
00 Reserved
01 Reserved, should be cleared
10 ULPI parallel interface
11 Reserved
This bit is not defined in the EHCI specification.
Reserved, should be cleared
Reserved
This bit is not defined in the EHCI specification.
00 Full-speed
01 Low-speed
10 High-speed
11 Undefined
Reserved, should be cleared
30
14
0
0
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
PO
—
29
13
0
0
PP
—
28
12
1
0
Table 21-22. PORTSC Register Field Descriptions
Figure 21-20. Port Status and Control (PORTSC)
27
11
1
0
PSPD
LS
26
10
1
0
—
—
25
0
9
0
PFSC PHCD WKOC WKDS WLCN
PR
24
0
8
0
Description
SUSP
23
0
0
7
FPR
22
0
6
0
OCC
w1c
21
0
5
0
OCA
20
0
0
4
Universal Serial Bus Interfaces
PEC
w1c
19
0
3
0
PE
0
n
2
PTC
Access: Mixed
CSC
w1c
0
0
1
CCS
16
21-25
0
0
0