MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 928

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Enhanced Three-Speed Ethernet Controllers
The contents of the Rx FCB are defined in
14-180
Bytes
0–1
0–1
12–13
8–11
Bits
14
15
0
1
2
3
4
5
6
7
Name
GPFP
CTU
PER
VLN
TUP
ETU
CIP
EIP
IP6
IP
—
—
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
VLAN tag recognized. This bit is set only if RCTRL[VLEX] is set.
0 No VLAN tag recognized.
1 IEEE Std. 802.1Q VLAN tag found; VLAN control word in VLCTL is valid.
IP header found at layer 3.RCTRL[PRSDEP] must be set to 10 or 11 in order to enable IP
discovery. See also IP6 bit of FCB.
0 No layer 3 header recognized.
1 An IP header was recognized at layer 3; the IANA protocol identifier for the next header can be
If S/W is relying on the RxFCB for the parse results, any RxFCB[IP] bits set with the corresponding
RxFCB[PRO] = 0xFF indicates a fragmented packet (or that this packet had a back-to-back IPv6
routing extension header). Additionally, RQFPR[IPF] (see
Filer Table Property Register
IP version 6 header found at layer 3.
0 No IPv6 header was found.
1 The layer 3 header was an IPv6 header provided IP = 1.
TCP or UDP header found at layer 4. RCTRL[PRSDEP] must be set to 10 or 11 in order to enable
TCP/UDP discovery.
0 No layer 4 header recognized.
1 The layer 4 header was recognized as either TCP (PRO = 0x06) or UDP (PRO = 0x11).
IPv4 header checksum checked. RCTRL[PRSDEP] must be set to 10 or 11 in order to enable IPv4
checksum verification.
0 IPv4 header checksum not verified, either because verification was disabled or a valid IPv4
1 IPv4 header checksum was verified by the eTSEC, and bit EIP indicates result.
TCP or UDP header checksum checked. RCTRL[PRSDEP] must be set to 11 in order to enable
layer 4 checksum verification.
0 TCP or UDP header checksum not verified, either because verification was disabled or a valid
1 TCP or UDP header checksum was verified by the eTSEC, and ETU indicates result.
IPv4 header checksum verification error. Not valid unless CIP = 1.
0 No checksum error in IPv4 header.
1 Error in header checksum only if IP = 1 and IP6 = 0.
TCP or UDP header checksum verification error. Not valid unless CTU = 1.
0 No checksum error in TCP or UDP header.
1 Error in header checksum only if PRO = 0x06 or PRO = 0x11.
Reserved
Parse error.
00 No error in L2 to L4 parse
01 Reserved
10 Inconsistent or unsupported L3 header sequence
11 Reserved
Reserved
General-purpose filer event packet. This packet was filed based on matching a GPI rule sequence.
found in PRO; see PRO for more information.
header could not be located.
TCP or UDP header could not be located. If a UDP header with zero checksum was located,
this bit is cleared in accordance with RFC 768.
Table 14-159. Rx Frame Control Block Descriptions
Table
(RQFPR)”) indicates that the packet was fragmented.
14-159.
Description
Section 14.5.3.3.8, “Receive Queue
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