MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 1639

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Freescale Semiconductor
0x2_48A0–
0x2_4A04–
0x2_4B00–
0x2_4744–
0x2_4820–
0x2_4AFC
0x2_473C CAM2—Carry register two mask register
0x2_47FC
0x2_480C IGADDR3—Individual/group address register 3
0x2_481C IGADDR7—Individual/group address register 7
0x2_487C
0x2_488C GADDR3—Group address register 3
0x2_489C GADDR7—Group address register 7
0x2_49FC
0x2_4BF4
0x2_4A00 FIFOCFG*—FIFO interface configuration register
0x2_4730 CAR1—Carry register one register
0x2_4734 CAR2—Carry register two register
0x2_4738 CAM1—Carry register one mask register
0x2_4740 RREJ*—Receive filer rejected packet counter
0x2_4800 IGADDR0—Individual/group address register 0
0x2_4804 IGADDR1—Individual/group address register 1
0x2_4808 IGADDR2—Individual/group address register 2
0x2_4810 IGADDR4—Individual/group address register 4
0x2_4814 IGADDR5—Individual/group address register 5
0x2_4818 IGADDR6—Individual/group address register 6
0x2_4880 GADDR0—Group address register 0
0x2_4884 GADDR1—Group address register 1
0x2_4888 GADDR2—Group address register 2
0x2_4890 GADDR4—Group address register 4
0x2_4894 GADDR5—Group address register 5
0x2_4898 GADDR6—Group address register 6
eTSEC1
Offset
Reserved
Reserved
Reserved
Reserved
Reserved
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
eTSEC Counter Control and TOE Statistics Registers
Table A-2. Module Memory Map (continued)
Name
eTSEC DMA Attribute Registers
eTSEC FIFO Control Registers
3
1
3
Hash Function Registers
Complete List of Configuration, Control, and Status Registers
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
—
—
—
—
R
R
2
0xFE03_FFFF
0x000F_FFFD
0x0000_00C0
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
Reset
—
—
—
—
—
14.5.3.6.44/14-109
14.5.3.6.45/14-111
14.5.3.6.46/14-112
14.5.3.6.47/14-113
14.5.3.6.48/14-114
14.5.3.7.1/14-115
14.5.3.7.2/14-116
14.5.3.8.1/14-116
Section/Page
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A-27