MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 889

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14.5.4.3.5
Figure 14-126
Table 14-136
14.5.4.3.6
Figure 14-127
Freescale Semiconductor
11–15
Offset 0x07
0–12
Reset
Bits
Bits
10
13
14
15
Offset 0x06
Reset
W
R
W
R
Page
Next
Duplex
Name
Name
Page
Able
Rx’d
0
Full
NP
—
—
—
0
describes the fields of the ANEX register.
describes the definition for the ANEX register.
describes the definition for the ANNPT register.
AN Expansion Register (ANEX)
AN Next Page Transmit Register (ANNPT)
—
Reserved, should be cleared.
Next page able. This bit is read-only and returns 1 on read. While read as set, indicates local device supports
next page function.
Page received. This bit is read-only. The bit clears on a read to the register.
0 Normal operation.
1 A new page was received and stored in the applicable AN link partner ability or AN next page register. This
bit latches high in order for software to detect while polling.
Reserved, should be cleared.
1
Full-duplex capability. This bit is read-only.
0 Link partner is not capable of full-duplex mode.
1 Link partner is capable of full-duplex mode.
Reserved, should be cleared.
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Page
Msg
2
Figure 14-127. AN Next Page Transmit Register Definition
Table 14-135. ANLPBPA Field Descriptions (continued)
Figure 14-126. AN Expansion Register Definition
Ack2
3
Table 14-136. ANEX Field Descriptions
Toggle
4
—
5
All zeros
All zeros
Description
Description
Message/Un-formatted Code Field
Enhanced Three-Speed Ethernet Controllers
12
NP Able
13
Access: Read only
Page Rx’d
Access: Mixed
14
14-141
15
—
15