MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 845

BOARD DEV SYSTEM MPC8536E

MPC8536DS

Manufacturer Part Number
MPC8536DS
Description
BOARD DEV SYSTEM MPC8536E
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets

Specifications of MPC8536DS

Contents
Board, Software and Documentation
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
667 MHz
Operating Supply Voltage
- 0.3 V to + 1.21 V
Maximum Operating Temperature
+ 105 C
Data Ram Size
32 KB
Interface Type
SPI, USB
Program Memory Type
DDR2, DDR3, SDRAM
Core Size
32 Bit
Program Memory Size
544KB
Cpu Speed
1.5GHz
Digital Ic Case Style
BGA
No. Of Pins
783
Supply Voltage Range
0.95V To 1.05V
Rohs Compliant
Yes
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
14.5.3.6.19 Receive Carrier Sense Error Counter (RCSE)
Figure 14-73
Table 14-77
14.5.3.6.20 Receive Undersize Packet Counter (RUND)
Figure 14-74
Table 14-78
Freescale Semiconductor
16–31
16–31
0–15
0–15
Bits
Bits
Offset eTSEC1:0x2_46C8;
Offset eTSEC1:0x2_46CC;
Reset
Reset
W
W
R
R
RCSE Receive false carrier counter. Counts the number of times that the carrier sense condition was lost or never
Name
RUND
Name
eTSEC3:0x2_66C8
eTSEC3:0x2_66CC
0
0
describes the fields of the RCSE register.
describes the fields of the RUND register.
describes the definition for the RCSE register.
describes the definition for the RUND register.
Reserved
asserted when attempting to transmit a frame on a particular interface.
The count represented by an instance of this object is incremented at most once per transmission attempt,
even if the carrier sense condition fluctuates during a transmission attempt. The event is reported along with
the statistics generated on the next received frame, as defined by a 1 on TSEC n _RX_ER and an 0xE on
TSEC n _RXD. Only one false carrier condition can be detected and logged between frames.
Reserved
Receive undersize packet counter. Increments each time a frame is received which is less than 64 bytes in
length and contains a valid FCS and were otherwise well formed. This count does not include range length
errors.
Figure 14-73. Receive Carrier Sense Error Counter Register Definition
Figure 14-74. Receive Undersize Packet Counter Register Definition
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Table 14-78. RUND Field Descriptions
Table 14-77. RCSE Field Descriptions
All zeros
All zeros
15 16
15 16
Description
Description
Enhanced Three-Speed Ethernet Controllers
RUND
RCSE
Access: Read/Write
Access: Read/Write
14-97
31
31

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