MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 651

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

13.3
Table 13-3
offset 0x000–0xFFF are reserved.
Freescale Semiconductor
0x07C–
0x040–
0x00C
0x01C
0x02C
0x03C
0x06C
0x08C
0x000
0x008
0x010
0x018
0x020
0x028
0x030
0x038
0x004
0x014
0x024
0x034
0x064
0x068
0x070
0x074
0x078
0x080
0x084
0x088
Offset
Memory Map/Register Definition
shows the memory mapped registers of the eLBC. Undefined 4-byte address spaces within
BR0—Base register 0
BR1—Base register 1
BR2—Base register 2
BR3—Base register 3
BR4—Base register 4
BR5—Base register 5
BR6—Base register 6
BR7—Base register 7
OR0—Options register 0
OR1—Options register 1
OR2—Options register 2
OR3—Options register 3
OR4—Options register 4
OR5—Options register 5
OR6—Options register 6
OR7—Options register 7
Reserved
MAR—UPM address register
Reserved
MAMR—UPMA mode register
MBMR—UPMB mode register
MCMR—UPMC mode register
Reserved
MRTPR—Memory refresh timer prescaler register
MDR—UPM/FCM data register
Reserved
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Enhanced Local Bus Controller
Table 13-3. Enhanced Local Bus Controller Registers
Register
—Block Base Address 0x0_5000
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
—
—
—
0x0000_0FF7
0x0000_ nnnn
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
Reset
—
—
—
—
Enhanced Local Bus Controller
13.3.1.1/13-11
13.3.1.1/13-11
13.3.1.1/13-11
13.3.1.1/13-11
13.3.1.1/13-11
13.3.1.1/13-11
13.3.1.1/13-11
13.3.1.1/13-11
13.3.1.2/13-12
13.3.1.2/13-12
13.3.1.2/13-12
13.3.1.2/13-12
13.3.1.2/13-12
13.3.1.2/13-12
13.3.1.2/13-12
13.3.1.2/13-12
13.3.1.3/13-20
13.3.1.4/13-21
13.3.1.4/13-21
13.3.1.4/13-21
13.3.1.5/13-23
13.3.1.6/13-23
Section/Page
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13-9