MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 155

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DMA_DDONE[0:1] DMA done 0–1
Freescale Semiconductor
DMA_DREQ[0:1]
LFRB/LUPWAIT/
DMA_DACK[0:1]
DMA_DDONE2
DMA_DDONE3
LGPL0/LFCLE
LGPL1/LFALE
LGPL3/LFWP
LGPL4/LGTA/
DMA_DREQ2
DMA_DREQ3
LSYNC_OUT
DMA_DACK2
DMA_DACK3
LBS0/LFWE
LOE/LFRE
LSYNC_IN
LCLK[0:2]
LA[28:31]
LWE[1:3]/
LCS[0:4]
LBS[1:3]
IRQ[0:8]
LGPL2/
LPBSE
LBCTL
LGPL5
LWE0/
Name
LCS5
LCS6
LCS7
LA27
LALE
MCP
UDE
Table 3-1. MPC8536E Signal Reference by Functional Block (continued)
Local bus burst address
Local bus port address
Local bus chip select 0–4
Local bus chip select 5
Local bus chip select 6
Local bus chip select 7
Local bus write enable
/byte select 0
Local bus write enable
/byte select 1–3
Local bus data buffer control
Local bus address latch enable
Local bus UPM general purpose
line 0
Local bus GP line 1
Local bus GP line 2
/output enable
Local bus GP line 3
Local bus GP line 4/GPCM
terminate access/UPM wait
Local bus GP line 5 address
Local bus clock
Local bus PLL synchronization
Local bus PLL synchronization
DMA request 0–1
DMA request 2
DMA request 3
DMA acknowledge 0–1
DMA acknowledge 2
DMA acknowledge 3
DMA done 2
DMA done 3
Machine check processor
Unconditional debug event
External interrupt 0–8
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Description
Functional
Block
eLBC
eLBC
eLBC
eLBC
eLBC
eLBC
eLBC
eLBC
eLBC
eLBC
eLBC
eLBC
eLBC
eLBC
eLBC
eLBC
eLBC
eLBC
eLBC
DMA
DMA
DMA
DMA
DMA
DMA
DMA
DMA
DMA
PIC
PIC
PIC
Alternate Function(s)
cfg_host_agt[0:2]
cfg_core_speed
DMA_DDONE2
cfg_sys_pll[0:3]
cfg_sys_speed
cfg_dram_type
cfg_boot_seq0
cfg_boot_seq1
DMA_DREQ2
cfg_cpu_boot
DMA_DACK2
cfg_core_pll0
cfg_core_pll1
cfg_core_pll2
GPIO[14:15]
GPIO[10:11]
GPIO[12:13]
IRQ10
IRQ11
LCS5
LCS6
LCS7
IRQ9
—
—
—
—
—
—
—
—
Signals
No. of
1
4
5
1
1
1
1
3
1
1
1
1
1
1
1
1
3
1
1
2
1
1
2
1
1
2
1
1
1
1
9
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
Signal Descriptions
13-2/13-5
13-2/13-5
13-2/13-5
13-2/13-5
13-2/13-5
13-2/13-5
13-2/13-5
13-2/13-5
13-2/13-5
13-2/13-5
13-2/13-5
13-2/13-5
13-2/13-5
13-2/13-5
13-2/13-5
13-2/13-5
13-2/13-5
13-2/13-5
13-2/13-5
15-3/15-5
15-3/15-5
15-3/15-5
15-3/15-5
15-3/15-5
15-3/15-5
15-3/15-5
15-3/15-5
15-3/15-5
9-3/9-8
9-3/9-8
9-3/9-8
Table/
Page
3-5